Abstract: The present application discloses an OLED display structure, including pixels. The pixels include a first sub-pixel, a second sub-pixel and a third sub-pixel. The first sub-pixel includes a first storage capacitor, a first auxiliary capacitor and a first light emitting area. The second sub-pixel includes a second storage capacitor, a second auxiliary capacitor and a second light emitting area. The third sub-pixel includes a third storage capacitor, a third auxiliary capacitor and a third light emitting area. The areas of the first light emitting area, the second light emitting area and the third light emitting area are respectively defined as S (1), S (2) and S (3); the capacitance values of the first auxiliary capacitor, the second auxiliary capacitor and the third auxiliary capacitor are respectively defined as C2(1), C2(2) and C2(3). S(1)<S(2)<S(3), and C2(1)>C2(2)>C2(3).

Abstract: A display device includes a pixel array including M rows of pixel units, M scanning lines, a first drive module, and a second drive module. An Nth scanning line is connected to the pixel units in an Nth row and the pixel units (11) in an (N+2)th row. One of the first drive module and the second drive module is connected to the scanning line connected to the pixel units in an odd row and is configured to supply, via the scanning line, a scanning signal and a reset signal to the pixel units in the odd row, and the other of the drive modules is connected to the scanning line connected to the pixel units in an even row and is configured to supply, via the scanning line, a scanning signal and a reset signal to the pixel units in the even row.

Abstract: A pixel unit includes a drive unit, a display unit, a threshold compensation unit and a reset unit. The drive unit is configured to provide a drive current to the display unit in according to an emission signal received and image data received during a display phase to drive the display unit to perform image display. The reset unit is configured to write a reset voltage to the drive unit according to a reset signal during a reset phase to reset the drive unit. The threshold compensation unit is configured to provide a compensation voltage to the drive unit during a voltage compensation phase under the control of a second scan signal; the voltage compensation phase and the reset phase overlap partially. An array substrate and a display terminal both of which include the pixel unit are further provided.

Abstract: A touch display panel and a display device are provided. The touch display panel includes a display region and a non-display region. The display region includes a plurality of pixel electrodes and a plurality of touch control electrodes, and the non-display region includes a fan-out region and a bonding region used to bond a driving circuit. The bonding region includes a plurality of first pads and a plurality of second pads. A first pad is electrically connected to a signal output terminal of the driving circuit. A second pad is electrically connected to a signal input terminal of the driving circuit. The fan-out region includes a plurality of first trace wires electrically connected to the plurality of pixel electrodes as well as the plurality of first pads, and a plurality of second trace wires electrically connected to the touch control electrodes as well as the plurality of second pads.

Abstract: Embodiments of the present disclosure provide a pulse generation device, an array substrate, a drive circuit and a driving method. The pulse generation device includes: a reset module making a pulse output end output low level, in response to a low level of a first input end or in response to a low level of a second input end and a low level of a third input end; a pulse generation module making the pulse output end output a high level, in response to a high level of the first input end, a high level of the second input end and a low level of the third input end or in response to a high level of the first input end, a low level of the second input end and a high level of the third input end.

Abstract: A touch display panel and a display device are provided. The touch display panel includes a display region and a non-display region. The display region includes a plurality of pixel electrodes and a plurality of touch control electrodes, and the non-display region includes a fan-out region and a bonding region used to bond a driving circuit. The bonding region includes a plurality of first pads and a plurality of second pads. A first pad is electrically connected to a signal output terminal of the driving circuit. A second pad is electrically connected to a signal input terminal of the driving circuit. The fan-out region includes a plurality of first trace wires electrically connected to the plurality of pixel electrodes as well as the plurality of first pads, and a plurality of second trace wires electrically connected to the touch control electrodes as well as the plurality of second pads.

Abstract: Embodiments of the present disclosure provide a pulse generation device, an array substrate, a drive circuit and a driving method. The pulse generation device includes: a reset module making a pulse output end output low level, in response to a low level of a first input end or in response to a low level of a second input end and a low level of a third input end; a pulse generation module making the pulse output end output a high level, in response to a high level of the first input end, a high level of the second input end and a low level of the third input end or in response to a high level of the first input end, a low level of the second input end and a high level of the third input end.

Abstract: The present invention discloses a gate driving circuit and a display device having the same. The gate driving circuit includes a logic circuit, a plurality of shift register units and enable circuits. The logic circuit is configured to receive a first clock signal, a second clock signal, a third clock signal, and a fourth signal, and output a logic pulse signal for driving the plurality of shift register units and enable circuits. Each of the plurality of enable circuits is connected with one of the plurality of shift register units and configured to receive a first pulse signal outputted by one of the plurality of shift register units and the logic pulse signal outputted by the logic circuit, and output two second pulse signals to drive two respective gate lines.

Abstract: The present invention discloses a gate driving circuit and a display device having the same. The gate driving circuit includes a logic circuit, a plurality of shift register units and enable circuits. The logic circuit is configured to receive a first clock signal, a second clock signal, a third clock signal, and a fourth signal, and output a logic pulse signal for driving the plurality of shift register units and enable circuits. Each of the plurality of enable circuits is connected with one of the plurality of shift register units and configured to receive a first pulse signal outputted by one of the plurality of shift register units and the logic pulse signal outputted by the logic circuit, and output two second pulse signals to drive two respective gate lines.