Patents by Inventor Qingwei LUO

Qingwei LUO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935407
    Abstract: A dynamic loose vehicle formation method based on real-time online navigation map, which belongs to the field of vehicle formation technologies. The method includes a driver inputs travel information of a destination and waypoints in a GIS app; the GIS app uploads the travel information to a GIS server; the driver chooses to join a recommended formation or create a formation in the GIS app; when the driver chooses the formation and joins the formation, the formation information is displayed on the GIS app interface and sent to other vehicles within the formation for information interaction; when the driver chooses to leave the formation and leaves the formation, the formation is adjusted and the GIS server updates the formation information.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: March 19, 2024
    Assignee: SHANDONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Shufeng Wang, Qingwei Liang, Li Li, Yuyan Wang, Huayue Zhang, Baokang Zhang, Sunquan Long, Guansheng Wu, Mengqi Luo, Xianbin Du, Junyou Zhang
  • Patent number: 10784117
    Abstract: A defect relieving method for a floating gate is disclosed, which includes: providing a front-end structure, including an active region, a gate oxide layer on the active region, a mask layer on the gate oxide layer, a plurality of trenches penetrating through the mask layer, the gate oxide layer, and at least part of the active region, and a filler that is filled in the trenches; performing a first etching process to remove a first thickness of the mask layer between adjacent ones of the trenches; performing a second etching process to remove a remaining thickness of the mask layer between the adjacent trenches, and reducing a width of a portion of the filler that exceeds a top surface of the gate oxide layer, thereby an opening is formed; and filling the opening with a floating gate. The method increases the diameter of the opening, thus avoiding occurrence of voids.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: September 22, 2020
    Assignee: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd.
    Inventors: Shengnan Huang, Qingwei Luo, Yun Li
  • Patent number: 10566203
    Abstract: A method for alleviating an etching defect of a salicide barrier layer is disclosed. The salicide barrier layer includes a first barrier layer, a second barrier layer and a third barrier layer. When the salicide barrier layer is being etched, the third barrier layer is removed during first etching. In this case, the second barrier layer is used as an etch stop layer, and the second barrier layer is removed during second etching. In this case, the first barrier layer is used as an etch stop layer, the first barrier layer is removed during third etching. The salicide barrier layer is divided into three layers, the second barrier layer and the first barrier layer are respectively used as an etch stop layer, so that the third barrier layer and the second barrier layer can be prevented from being over-etched, thereby effectively avoiding defects caused by over-etching and alleviating device performance.
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: February 18, 2020
    Assignee: Wuhan XinXin Semiconductor Manufacturing Co., Ltd.
    Inventors: Chenglong Wu, Qingwei Luo, Yun Li, Jun Zhou
  • Publication number: 20190362982
    Abstract: A defect relieving method for a floating gate is disclosed, which includes: providing a front-end structure, including an active region, a gate oxide layer on the active region, a mask layer on the gate oxide layer, a plurality of trenches penetrating through the mask layer, the gate oxide layer, and at least part of the active region, and a filler that is filled in the trenches; performing a first etching process to remove a first thickness of the mask layer between adjacent ones of the trenches; performing a second etching process to remove a remaining thickness of the mask layer between the adjacent trenches, and reducing a width of a portion of the filler that exceeds a top surface of the gate oxide layer, thereby an opening is formed; and filling the opening with a floating gate. The method increases the diameter of the opening, thus avoiding occurrence of voids.
    Type: Application
    Filed: December 28, 2018
    Publication date: November 28, 2019
    Inventors: Shengnan HUANG, Qingwei LUO, Yun LI
  • Publication number: 20190341262
    Abstract: A method for eliminating dislocations in an active area and a semiconductor device are disclosed. The method includes: providing a substrate containing the active area; forming source and drain regions in the active area through implanting arsenic therein by a low-energy implantation process under conditions including an implantation energy of 3 kV-30 kV; and performing an annealing process. In the method and semiconductor device of the present invention, the source and drain regions are formed in the active area by low-energy implantation of arsenic. In this way, by optimizing implantation condition of the source and drain, less lattice mismatch in the active area will occurred. Such effective inhibition of lattice dislocations can reduce the occurrence of leakage current. Further, with the recovery by the annealing process, dislocations in the active area can be further reduced, allowing improved performance of the final product.
    Type: Application
    Filed: November 29, 2018
    Publication date: November 7, 2019
    Inventors: Qingwei LUO, Jingjing XU, Yun LI, Jun ZHOU