Abstract: A device holder assembly that includes a body and a housing coupled to the body. A drive assembly is rotatably coupled to the housing. A leg assembly that includes a first leg and a second leg is coupled to the housing. A first rack gear is coupled to the first leg and the drive assembly. A second rack gear is coupled to the second leg and the drive assembly. The drive assembly permits instantaneous movement of the first leg and the second leg. A first finger is rotatably coupled to the first leg and a second finger is coupled to the second leg. The first finger has a first finger outer surface and the second finger has a second finger outer surface that are generally coplanar with the body outer surface when the first finger and the second finger are in a retracted position.

Abstract: A memory device with memory cell pairs each having a single continuous channel region, first and second floating gates over first and second portions of the channel region, an erase gate over a third portion of the channel region between the first and second channel region portions, and first and second control gates over the first and second floating gates. For each of the pairs of memory cells, the first region is electrically connected to the second region of an adjacent pair of memory cells in the same active region, and the second region is electrically connected to the first region of an adjacent pair of the memory cells in the same active region.

Abstract: The present disclosure provides an air conditioner comprising: an indoor heat exchanger to exchange heat between underground water and indoor air; an outdoor heat exchanger to exchange heat between underground water and outdoor air; a well; an underground water tank to store underground water; and a water pump to pump water from the well to the underground water tank. The indoor heat exchanger comprises a copper tube running through a row of parallel aluminum panels. Air is sucked by a fan through the indoor heat exchanger in the direction opposite to the underground water flow direction in the copper tube. Air is then passed through an evaporator unit of a compressor to be dehumidified. The underground water, after exchanging heat with the air to reach approximate room temperature, goes through a condensing unit of the compressor to release heat.

Abstract: The technology described herein is directed to compositions, sets, and methods for analyzing, detecting, and/or visualizing target molecules. In one aspect, described herein are sets of readout molecules to determine the identity of at least one oligonucleotide tag hybridized to at least one target molecule. In another aspect, described herein are methods of detecting said oligonucleotide tags bound to at least one target molecules using said set of readout molecules.

Abstract: An anomaly detection method for detecting an anomaly in an in-vehicle network of an in-vehicle network system including a plurality of electronic control units that transmit and receive messages via the network includes: generating image data of a reception interval between a plurality of messages included in a message sequence in a predetermined period out of a message sequence received from the in-vehicle network, or image data of a transition of a sensor value of the plurality of messages; classifying the image data using a trained CNN according to whether an attack message has been inserted in the predetermined period; and when the attack message has been inserted in the predetermined period, outputting a detection result indicating that an insertion attack which is an insertion of the attack message has been made in the predetermined period.

Abstract: An execution unit circuit for use in a processor core provides efficient use of area and energy by reducing the per-entry storage requirement of a load-store unit issue queue. The execution unit circuit includes a recirculation queue that stores the effective address of the load and store operations and the values to be stored by the store operations. A queue control logic controls the recirculation queue and issue queue so that that after the effective address of a load or store operation has been computed, the effective address of the load operation or the store operation is written to the recirculation queue and the operation is removed from the issue queue, so that address operands and other values that were in the issue queue entry no longer require storage. When a load or store operation is rejected by the cache unit, it is subsequently reissued from the recirculation queue.

Abstract: An execution unit circuit for use in a processor core provides efficient use of area and energy by reducing the per-entry storage requirement of a load-store unit issue queue. The execution unit circuit includes a recirculation queue that stores the effective address of the load and store operations and the values to be stored by the store operations. A queue control logic controls the recirculation queue and issue queue so that that after the effective address of a load or store operation has been computed, the effective address of the load operation or the store operation is written to the recirculation queue and the operation is removed from the issue queue, so that address operands and other values that were in the issue queue entry no longer require storage. When a load or store operation is rejected by the cache unit, it is subsequently reissued from the recirculation queue.

Abstract: An apparatus is provided, where the apparatus includes a plurality of components; a first circuitry to generate a clock signal, and to supply the clock signal to the plurality of components; a second circuitry to estimate, for each of two or more components of the plurality of components, a corresponding duty cycle of the clock signal received at the corresponding component, wherein two or more duty cycles corresponding to the two or more components are determined; a third circuitry to determine an average of the two or more duty cycles; and a fourth circuitry to correct a duty cycle of the clock signal generated by the first circuitry, based at least in part on the average.

Abstract: A method for making a heat-resistant roll includes pre-selecting a plurality of heat-resistant disks and pressing at least a selected portion of the pre-selected disks together such that a total axial thickness of the pressed disks relative to a total axial thickness of the selected disks prior to pressing is within a predetermined range.

Abstract: Systems and methods are described in relation to specific technical improvements adapted for machine learning architectures that conduct classification on numerical and/or unstructured data. In an embodiment, two neural networks are utilized in concert to generate output data sets representative of predicted future states of an entity. A second learning architecture is trained to cluster prior entities based on characteristics converted into the form of features and event occurrence such that a boundary function can be established between the clusters to form a decision boundary between decision regions. These outputs are mapped to a space defined by the boundary function, such that the mapping can be used to determine whether a future state event is likely to occur at a particular time in the future.

Abstract: A memory device with memory cell pairs each having a single continuous channel region, first and second floating gates over first and second portions of the channel region, an erase gate over a third portion of the channel region between the first and second channel region portions, and first and second control gates over the first and second floating gates. For each of the pairs of memory cells, the first region is electrically connected to the second region of an adjacent pair of memory cells in the same active region, and the second region is electrically connected to the first region of an adjacent pair of the memory cells in the same active region.

Abstract: A memory device with memory cell pairs each having a single continuous channel region, first and second floating gates over first and second portions of the channel region, an erase gate over a third portion of the channel region between the first and second channel region portions, and first and second control gates over the first and second floating gates. For each of the pairs of memory cells, the first region is electrically connected to the second region of an adjacent pair of memory cells in the same active region, and the second region is electrically connected to the first region of an adjacent pair of the memory cells in the same active region.

Abstract: Methods of making recombinant secretion of silk and silk-amyloid proteins using bacteria are provided.

Abstract: The technology described herein is directed to methods, systems, and compositions for analyzing, detecting, and/or visualizing target molecules. Described herein are compositions and systems comprising oligonucleotide tags comprising barcoded cassettes. Also described herein are methods for analyzing target molecules, the method comprising contacting a sample with at least one oligonucleotide tag, contacting the sample with at least two readout molecules, and detecting the relative spatial order of the readout molecules.

Abstract: A method for regenerating ammonia water after capturing carbon dioxide with aqueous ammonia includes steps as follow. An ammonia water regenerating system is provided, wherein the ammonia water regenerating system includes a heat exchanger, a stripper, a second pump, a first flash drum, a first compressor, a second flash drum and a second compressor. A first flashing step is performed, wherein the rich solvent is flashed to form a first steam and a first flash liquid. A first compressing step is performed, wherein the first steam is compressed. A stripping step is performed, wherein the first flash liquid is stripped. A second flashing step is performed, wherein the lean solvent is flashed to form a second steam and a second flash liquid. A second compressing step is performed, wherein the second steam is compressed.

Abstract: An event data and location-linked spherical imaging system including a spherical imager configured for capturing a spherical image with an action; a localization device collocated with the spherical imager, the localization device configured for providing a location of the spherical imager; a level collocated with the spherical imager, the level configured for indicating an imaging level of the spherical imager; an event data receiver configured for receiving event data from a user, the event data is associated with one or more points of interest on the spherical image; and a compass configured for providing an orientation of the spherical imager in capturing the spherical image, wherein the orientation and location-linked event data is accessible within the context of the spherical image. In one embodiment, the spherical imager includes no more than two imagers. In one embodiment, the action is a single capture.

Abstract: A method and apparatus for an automobile's magneto-rheological brake (MRB) are disclosed which include: a shaft connected to a stationary housing, a magneto-rheological fluid chamber positioned inside the stationary housing, a rotary disc connected to and rotate with the shaft, a plurality of magnetic coils wound directly onto a lateral side of the MRB chamber.

Abstract: An execution unit circuit for use in a processor core provides efficient use of area and energy by reducing the per-entry storage requirement of a load-store unit issue queue. The execution unit circuit includes a recirculation queue that stores the effective address of the load and store operations and the values to be stored by the store operations. A queue control logic controls the recirculation queue and issue queue so that that after the effective address of a load or store operation has been computed, the effective address of the load operation or the store operation is written to the recirculation queue and the operation is removed from the issue queue, so that address operands and other values that were in the issue queue entry no longer require storage. When a load or store operation is rejected by the cache unit, it is subsequently reissued from the recirculation queue.

Abstract: Disclosed are methods of making recombinant secretion of silk and collagen proteins, and amyloid fusions thereof, using bacteria.

Abstract: An execution unit circuit for use in a processor core provides efficient use of area and energy by reducing the per-entry storage requirement of a load-store unit issue queue. The execution unit circuit includes a recirculation queue that stores the effective address of the load and store operations and the values to be stored by the store operations. A queue control logic controls the recirculation queue and issue queue so that that after the effective address of a load or store operation has been computed, the effective address of the load operation or the store operation is written to the recirculation queue and the operation is removed from the issue queue, so that address operands and other values that were in the issue queue entry no longer require storage. When a load or store operation is rejected by the cache unit, it is subsequently reissued from the recirculation queue.