Patents by Inventor R. Scott Hartog

R. Scott Hartog has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6072505
    Abstract: A rasterizer comprised of a bounding box calculator, a plane converter, a windower, and incrementers. For each polygon to be processed, a bounding box calculation is performed which determines the display screen area, in spans, that totally encloses the polygon and passes the data to the plane converter. The plane converter also receives as input attribute values for each vertex of the polygon. The plane converter computes planar coefficients for each attribute of the polygon, for each of the edges of the polygon. The plane converter unit computes the start pixel center location at a start span and a starting coefficient value at that pixel center. The computed coefficients also include the rate of change or gradient, for each polygon attribute in the x and y directions, respectively. The plane converter also computes line coefficients for each of the edges of the polygon.
    Type: Grant
    Filed: April 1, 1998
    Date of Patent: June 6, 2000
    Assignee: Real 3D, Inc.
    Inventors: Thomas A. Piazza, R. Scott Hartog, Michael Mantor, Jeffrey D. Potter, Ralph Clayton Taylor, Michael A. Mang
  • Patent number: 6067090
    Abstract: A pipeline apparatus for processing 3D graphics data will be described. The pipeline apparatus includes a first request memory to fetch information corresponding to a texture operand. A second request memory fetches information responding to a color operand and Z operand. A control circuit coordinates data flow from the first request memory and the second request memory into a memory channel by preventing the number of requests from the first request memory from exceeding by a predetermined number, the number of requests from the second request memory. By properly coordinating the data flow, deadlock of a data fetching pipeline is avoided.
    Type: Grant
    Filed: February 4, 1998
    Date of Patent: May 23, 2000
    Assignee: Intel Corporation
    Inventors: Aditya Sreenivas, Kam Leung, Sajjad Zaidi, Brian Rauchfuss, John Austin Carey, R. Scott Hartog, Michael Mantor