Abstract: A mode sequencer circuitry for a time-of-flight system, the time-of-flight system including at least an imaging unit and an illumination unit, the imaging unit having a data bus interface for transmitting data to an application processor over a data bus.

Abstract: An electronic device comprising a clock-gated latch between two routing wires which transport a demodulation signal from a demodulation driver to pixels of a pixel column of a pixel array.

Abstract: The present disclosure generally pertains to a time-of-flight sensing circuitry for sensing image information in different imaging modes, having: a light sensing circuitry for detecting light and outputting light sensing signals; and a logic circuitry for processing the light sensing signals from the light sensing circuitry, wherein the logic circuitry is configured to dynamically set an imaging mode among the different imaging modes.

Abstract: The present disclosure generally pertains to a time-of-flight sensing circuitry configured to: ? determine a first point of time, at which a first voltage signal (6) reaches a predetermined threshold (4); ? determine a second point of time, at which a second voltage signal (7) reaches the predetermined threshold (4); and ? determine a phase shift of detected light on the basis of a voltage difference between the first and the second voltage signal based on a time difference of the second point of time and the first point of time.

Abstract: The present disclosure pertains to a time-of-flight system, having: an illumination source, a time-of-flight camera having a time-of-flight sensor, including: a light sensing circuitry for detecting light and outputting light sensing signals; and a logic circuitry for processing the light sensing signals from the light sensing circuitry, wherein the logic circuitry includes a sequencer circuitry and a register circuitry, wherein the register circuitry includes multiple registers for storing data which are derived on the basis of the light sensing signals and wherein the sequencer circuitry is adapted to select at least a first set of registers of the register circuitry and a second set of registers of the register circuitry for dynamically providing a first type of frames based on the selected first set of registers and a second type of frames based on the selected second set of registers, wherein first type frames and second type frames are generated in a defined sequence of frames, and a host circuitry conn

Abstract: A time-of-flight apparatus has a light source for emitting a light pulse to a scene; a photo-detection portion for detecting at least the light pulse reflected from the scene within a first photo-detection time interval, wherein the photo-detection portion includes at least one photo-detection element; and a measurement circuitry configured to: drive, within a measurement time interval including the first photo-detection time interval, the at least one photo-detection element for detecting the light pulse reflected from the scene, and drain, within the measurement time interval and after the first photo-detection time interval, electrons from the at least one photo-detection element.

Abstract: The present disclosure pertains to an analysis portion for a time-of-flight imaging portion, wherein the time-of-flight imaging portion includes at least one imaging element of a first type and at least one imaging element of a second type, wherein the at least one imaging element of the first type and the at least one imaging element of the second type are arranged in a predetermined pattern, configured to: construct first imaging data of the at least one imaging element of the first type based on second imaging element data of the at least one imaging element of the second type, wherein the first imaging data are constructed based on a machine learning algorithm.

Abstract: A device has a plurality of analog-to-digital converters. Each of the plurality of analog-to-digital converters has a voltage offset, wherein a predefined set of voltage offsets has a voltage offset distribution pattern, which provides a fingerprint for the device.

Abstract: A device has a plurality of analog-to-digital converters. Each of the plurality of analog-to-digital converters has a voltage offset, wherein a predefined set of voltage offsets has a voltage offset distribution pattern, which provides a fingerprint for the device.

Abstract: A high-gain, low power, electronic amplifier for amplification of a low magnitude voltage signal through a comparator-integrator amplification method for energy-aware applications is disclosed. The electronic amplifier comprises: a comparator arrangement with at least one comparator unit adapted to receive a first voltage signal to be amplified and a first feedback voltage signal, and to generate a first two-level voltage comparison signal; a integrator arrangement to receive the first two-level voltage comparison signal and generate a first amplifier output signal corresponding to an amplification of the voltage signal to be amplified; and a first feedback network to receive the first amplifier output signal and generate the first feedback voltage signal.

Abstract: A high-gain, low power, electronic amplifier for amplification of a low magnitude voltage signal through a comparator-integrator amplification method for energy-aware applications is disclosed. The electronic amplifier comprises: a comparator arrangement with at least one comparator unit adapted to receive a first voltage signal to be amplified and a first feedback voltage signal, and to generate a first two-level voltage comparison signal; a integrator arrangement to receive the first two-level voltage comparison signal and generate a first amplifier output signal corresponding to an amplification of the voltage signal to be amplified; and a first feedback network to receive the first amplifier output signal and generate the first feedback voltage signal.