Patents by Inventor Rafi Ben-Tal
Rafi Ben-Tal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220083109Abstract: An electronic device may include a substrate having a substrate body. The electronic device may include a first interconnect region, for example located proximate to a first end of the substrate. The first interconnect region may extend from the substrate body. The first interconnect region may include a first set of interconnects, and the first set of interconnects may be located proximate to the substrate body. The first interconnect region may include a second set of interconnects, and the second set of interconnects may be located remote from the substrate body. The second set of interconnects may be physically separated from the first set of interconnects, for example by an inactive region. The first set of interconnects may be located between the inactive region and the substrate body.Type: ApplicationFiled: July 26, 2021Publication date: March 17, 2022Inventors: Raanan Sover, Eytan Mann, Rafi Ben-Tal, Richard S. Perry
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Patent number: 11073873Abstract: An electronic device may include a substrate having a substrate body. The electronic device may include a first interconnect region, for example located proximate to a first end of the substrate. The first interconnect region may extend from the substrate body. The first interconnect region may include a first set of interconnects, and the first set of interconnects may be located proximate to the substrate body. The first interconnect region may include a second set of interconnects, and the second set of interconnects may be located remote from the substrate body. The second set of interconnects may be physically separated from the first set of interconnects, for example by an inactive region. The first set of interconnects may be located between the inactive region and the substrate body.Type: GrantFiled: March 25, 2020Date of Patent: July 27, 2021Assignee: Intel CorporationInventors: Raanan Sover, Eytan Mann, Rafi Ben-Tal, Richard S Perry
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Patent number: 10942542Abstract: Embodiments include apparatuses, systems, and methods associated with modulating a clock signal to encode information. A system may include a plurality of dies including a first die. The first die may include a real time clock (RTC) circuit to receive clock information associated with a shared clock signal that is shared among the plurality of dies, and modulate a RTC signal to encode the clock information. The first die may further include an output terminal coupled to the RTC circuit to pass the modulated RTC signal to one or more other dies of the plurality of dies. A second die of the plurality of dies may include a decoder to receive the modulated RTC signal and extract the clock information. The second die may adjust and/or condition the shared clock signal based on the received clock information. Other embodiments may be described and claimed.Type: GrantFiled: June 30, 2016Date of Patent: March 9, 2021Assignee: INTEL IP CORPORATIONInventors: Rafi Ben-Tal, Junlin Yan
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Patent number: 10892914Abstract: For example, a wireless communication receiver may be configured to switch one or more RF components of the receiver between an on-state and an off-state based on at least one detection criterion for preamble detection of a frame preamble by a preamble detector of the receiver, switching the one or more RF components between the on-state and the off-state including switching the one or more RF components from the on-state to the off-state based on determination that the at least one detection criterion is not met, and switching the one or more RF components from the off-state to the on-state after an off-state period, wherein a duration of the off-state period is based at least on a preamble duration of the frame preamble; and to repeat switching the one or more RF components between the on-state and the off-state until the frame preamble is detected by the preamble detector.Type: GrantFiled: December 27, 2018Date of Patent: January 12, 2021Assignee: INTEL CORPORATIONInventors: Assaf Gurevitz, Oren Kaidar, Rafi Ben-Tal, Elad Meir, Hagay Barel
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Publication number: 20190132154Abstract: For example, a wireless communication receiver may be configured to switch one or more RF components of the receiver between an on-state and an off-state based on at least one detection criterion for preamble detection of a frame preamble by a preamble detector of the receiver, switching the one or more RF components between the on-state and the off-state including switching the one or more RF components from the on-state to the off-state based on determination that the at least one detection criterion is not met, and switching the one or more RF components from the off-state to the on-state after an off-state period, wherein a duration of the off-state period is based at least on a preamble duration of the frame preamble; and to repeat switching the one or more RF components between the on-state and the off-state until the frame preamble is detected by the preamble detector.Type: ApplicationFiled: December 27, 2018Publication date: May 2, 2019Inventors: Assaf Gurevitz, Oren Kaidar, Rafi Ben-Tal, Elad Meir, Hagay Barel
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Patent number: 10185385Abstract: A method and apparatus to reduce the idle link power in a platform. In one embodiment of the invention, the host and its coupled endpoint(s) in the platform each has a low power idle link state that allows disabling of the high speed link circuitry in both the host and its coupled endpoint(s). This allows the platform to reduce its idle power as both the host and its coupled endpoint(s) are able to turn off their high speed link circuitry in one embodiment of the invention.Type: GrantFiled: June 13, 2016Date of Patent: January 22, 2019Assignee: Intel CorporationInventors: Paul S. Diefenbaugh, Robert E. Gough, Yuval Bachrach, Mikal C. Hunsaker, Rafi Ben-Tal, Ilan Pardo, Gideon Prat, David J. Harriman
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Publication number: 20180004245Abstract: Embodiments include apparatuses, systems, and methods associated with modulating a clock signal to encode information. A system may include a plurality of dies including a first die. The first die may include a real time clock (RTC) circuit to receive clock information associated with a shared clock signal that is shared among the plurality of dies, and modulate a RTC signal to encode the clock information. The first die may further include an output terminal coupled to the RTC circuit to pass the modulated RTC signal to one or more other dies of the plurality of dies. A second die of the plurality of dies may include a decoder to receive the modulated RTC signal and extract the clock information. The second die may adjust and/or condition the shared clock signal based on the received clock information. Other embodiments may be described and claimed.Type: ApplicationFiled: June 30, 2016Publication date: January 4, 2018Inventors: Rafi Ben-Tal, Junlin Yan
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Publication number: 20170123475Abstract: A method and apparatus to reduce the idle link power in a platform. In one embodiment of the invention, the host and its coupled endpoint(s) in the platform each has a low power idle link state that allows disabling of the high speed link circuitry in both the host and its coupled endpoint(s). This allows the platform to reduce its idle power as both the host and its coupled endpoint(s) are able to turn off their high speed link circuitry in one embodiment of the invention.Type: ApplicationFiled: June 13, 2016Publication date: May 4, 2017Inventors: Paul S. Diefenbaugh, Robert E. Gough, Yuval Bachrach, Mikal C. Hunsaker, Rafi Ben-Tal, Ilan Pardo, Gideon Prat, David J. Harriman
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Patent number: 9462549Abstract: Certain embodiments herein relate to optimizing power consumption associated with processing group addressed messages. For example, a station may receive a group addressed message (e.g., a broadcast or multicast message) from the access point. An expected time at which such group addressed messages may be received may be determined such that the group addressed messages may be processed without processing beacon frames, thereby consuming less battery power, and as a result, optimizing power consumption at wireless stations.Type: GrantFiled: March 28, 2014Date of Patent: October 4, 2016Assignee: Intel CorporationInventors: Ayelet Alon, Rafi Ben-Tal
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Patent number: 9367116Abstract: A system on a chip (SoC) is provided including processing cores and a root complex. The transaction requests are communicated between a root port of the root complex and a device, the root port including electrical idle (EI) exit detect circuitry and a reference clock source. The root port supports a first link state, in which the reference clock source and EI exit detect circuitry of the root port are disabled but a common mode voltage is maintained, and a second link state, in which the reference clock source and EI exit detect circuitry are disabled and the common mode voltage is not maintained. The root port transitions to the first link state based on a service latency requirement of the device being less than a threshold and to the second link state based on the service latency requirement being greater than or equal to the threshold.Type: GrantFiled: December 22, 2015Date of Patent: June 14, 2016Assignee: Intel CorporationInventors: Paul S. Diefenbaugh, Robert E. Gough, Yuval Bachrach, Mikal C. Hunsaker, Rafi Ben-Tal, Ilan Pardo, Gideon Prat, David J. Harriman
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Publication number: 20160109925Abstract: A system on a chip (SoC) is provided including processing cores and a root complex. The transaction requests are communicated between a root port of the root complex and a device, the root port including electrical idle (EI) exit detect circuitry and a reference clock source. The root port supports a first link state, in which the reference clock source and EI exit detect circuitry of the root port are disabled but a common mode voltage is maintained, and a second link state, in which the reference clock source and EI exit detect circuitry are disabled and the common mode voltage is not maintained. The root port transitions to the first link state based on a service latency requirement of the device being less than a threshold and to the second link state based on the service latency requirement being greater than or equal to the threshold.Type: ApplicationFiled: December 22, 2015Publication date: April 21, 2016Inventors: Paul S. Diefenbaugh, Robert E. Gough, Yuval Bachrach, Mikal C. Hunsaker, Rafi Ben-Tal, Ilan Pardo, Gideon Prat, David J. Harriman
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Patent number: 9280198Abstract: A method and apparatus to reduce the idle link power in a platform. In one embodiment of the invention, the host and its coupled endpoint(s) in the platform each has a low power idle link state that allows disabling of the high speed link circuitry in both the host and its coupled endpoint(s). This allows the platform to reduce its idle power as both the host and its coupled endpoint(s) are able to turn off their high speed link circuitry in one embodiment of the invention.Type: GrantFiled: January 6, 2014Date of Patent: March 8, 2016Assignee: Intel CorporationInventors: Paul S. Diefenbaugh, Robert E. Gough, Yuval Bachrach, Mikal C. Hunsaker, Rafi Ben-Tal, Ilan Pardo, Gideon Prat, David J. Harriman
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Publication number: 20150282079Abstract: Certain embodiments herein relate to optimizing power consumption associated with processing group addressed messages. For example, a station may receive a group addressed message (e.g., a broadcast or multicast message) from the access point. An expected time at which such group addressed messages may be received may be determined such that the group addressed messages may be processed without processing beacon frames, thereby consuming less battery power, and as a result, optimizing power consumption at wireless stations.Type: ApplicationFiled: March 28, 2014Publication date: October 1, 2015Inventors: AYELET ALON, RAFI BEN-TAL
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Publication number: 20140310543Abstract: A method and apparatus to reduce the idle link power in a platform. In one embodiment of the invention, the host and its coupled endpoint(s) in the platform each has a low power idle link state that allows disabling of the high speed link circuitry in both the host and its coupled endpoint(s). This allows the platform to reduce its idle power as both the host and its coupled endpoint(s) are able to turn off their high speed link circuitry in one embodiment of the invention.Type: ApplicationFiled: January 6, 2014Publication date: October 16, 2014Inventors: Paul S. Diefenbaugh, Robert E. Gough, Yuval Bachrach, Mikal C. Hunsake, Rafi Ben-Tal, Ilan Pardo, Gideon Prat, David J. Harriman
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Patent number: 8689028Abstract: A method and apparatus to reduce the idle link power in a platform. In one embodiment of the invention, the host and its coupled endpoint(s) in the platform each has a low power idle link state that allows disabling of the high speed link circuitry in both the host and its coupled endpoint(s). This allows the platform to reduce its idle power as both the host and its coupled endpoint(s) are able to turn off their high speed link circuitry in one embodiment of the invention.Type: GrantFiled: July 1, 2011Date of Patent: April 1, 2014Assignee: Intel CorporationInventors: Paul S. Diefenbaugh, Robert E. Gough, Yuval Bachrach, Mikal C. Hunsaker, Rafi Ben-Tal, Ilan Pardo, Gideon Prat, David J. Harriman
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Publication number: 20130007483Abstract: A method and apparatus to reduce the idle link power in a platform. In one embodiment of the invention, the host and its coupled endpoint(s) in the platform each has a low power idle link state that allows disabling of the high speed link circuitry in both the host and its coupled endpoint(s). This allows the platform to reduce its idle power as both the host and its coupled endpoint(s) are able to turn off their high speed link circuitry in one embodiment of the invention.Type: ApplicationFiled: July 1, 2011Publication date: January 3, 2013Inventors: Paul S. Diefenbaugh, Robert E. Gough, Yuval Bachrach, Mikal C. Hunsaker, Rafi Ben-Tal, Ilan Pardo, Gideon Prat, David J. Harriman
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Patent number: 5991339Abstract: An adaptive equalizer is implemented using digital feedback control and using jitter as the adjustment criteria. An adjustable transfer function is implemented to equalize an input signal to enhance the frequency response of the associated system. Jitter is determined for the filtered signal, and the frequency response of the transfer function is varied accordingly by applying a digital adjustment signal to the transfer function structure (for example, a lead-lag filter). The adaptive equalizer can thereby adapt to various transmission medium lengths and signal degradation levels.Type: GrantFiled: January 16, 1998Date of Patent: November 23, 1999Assignee: Intel CorporationInventors: Mel Bazes, Rafi Ben-Tal