Patents by Inventor Ragahavendar M. Rao

Ragahavendar M. Rao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multiplication of matrices using systolic arrays
    Patent number: 8924455
    Abstract: In one embodiment, a matrix multiplication circuit is provided. The circuit includes a plurality of systolic arrays, a pre-processing circuit, and a post-processing circuit. The pre-processing circuit is configured to receive first and second input matrices, and decompose the first input matrix into a plurality of sub-matrices. The pre-processing circuit inputs each of the plurality of sub-matrices to at least a respective one of the plurality of systolic arrays for multiplication with the second input matrix. The post-processing circuit is configured to combine output of the systolic arrays into a result matrix.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: December 30, 2014
    Assignee: Xilinx, Inc.
    Inventors: Kaushik Barman, Parag Dighe, Ragahavendar M. Rao