Abstract: A transmitter transmits a first signal via a first cable at a first baud rate. A receiver receives a second signal via the first cable concurrently with transmitting the first signal via the first cable. The second signal is transmitted by another device at a second baud. rate that is lower than both i) the first baud rate and ii) a third baud rate at which a third signal is being transmitted in a second cable that causes crosstalk in the second signal being received via the first cable. Reception of the second signal at the second baud rate that is lower than the third baud rate facilitates mitigation of the crosstalk in the second signal caused by transmission of the third signal in the second cable at the third baud rate.

Abstract: A physical layer transceiver for a wireline communications system includes a receive path for communicating signals received from the medium to a functional circuit, a transmit path for communicating signals received from the functional circuit onto the medium, and echo cancellation circuitry for cancelling from the receive path echoes of signals transmitted on the transmit path. The echo cancellation circuitry includes a plurality of high-dynamic-range filter segments, a plurality of low-dynamic-range filter segments, and control circuitry configured to detect on the receive path the echoes of the signals transmitted on the transmit path, classify each echo signal as having a low dynamic range or a high dynamic range, and deploy a high-dynamic-range segment to a location of an echo signal having a high dynamic range, and deploy a low-dynamic-range segment to a location of an echo signal having a low dynamic range.

Abstract: A network interface device operates in a normal transmit operating mode in which the network interface device continually receives transmission symbols from a link partner via the communication link. The network interface device determines that receive circuitry of the network interface device is to transition to a low power mode in response to receiving a sleep signal from the link partner. The network interface device then operates according to a quiet/refresh cycle of the low power mode to conserve power. The quiet/refresh cycle corresponds to a time schedule that includes a refresh time window in which receive circuitry of the network interface device is to be powered to receive a refresh signal from the link partner Immediately after transmission of the sleep signal, the network interface device transitions to a quiet time window of the time schedule in which the network interface device ignores transmissions from the link partner.

Abstract: A physical layer transceiver, for connecting a host device to a wireline channel medium that is divided into a total number of link segments, includes a host interface for coupling to a host device, a line interface for coupling to the wireline channel medium, and feed-forward equalization (FFE) circuitry operatively coupled to the line interface to add back, into a signal, components that were scattered in time. Respective individual filter segments are selectably configurable, by adjustment of respective delay lines, to correspond to respective individual link segments. The FFE circuitry also includes control circuitry configured to detect a signal energy peak in at least one particular link segment and, upon detection of the signal energy peak in the particular link segment, configure a respective one of the respective individual filter segments, by adjustment of a respective delay line, to correspond to the respective particular link segment.

Abstract: A physical layer transceiver, for connecting a host device to a wireline channel medium that is divided into a total number of link segments, includes a host interface for coupling to a host device, a line interface for coupling to the wireline channel medium, and feed-forward equalization (FFE) circuitry operatively coupled to the line interface to add back, into a signal, components that were scattered in time. Respective individual filter segments are selectably configurable, by adjustment of respective delay lines, to correspond to respective individual link segments. The FFE circuitry also includes control circuitry configured to detect a signal energy peak in at least one particular link segment and, upon detection of the signal energy peak in the particular link segment, configure a respective one of the respective individual filter segments, by adjustment of a respective delay line, to correspond to the respective particular link segment.

Abstract: A communication system includes a first physical-layer (PHY) transceiver and a second PHY transceiver. The first PHY transceiver includes (i) a first transmitter and (ii) a first receiver including a first equalizer. The second PHY transceiver includes (i) a second transmitter and (ii) a second receiver including a second equalizer. The first PHY transceiver and the second PHY transceiver are configured to communicate with one another over a full-duplex link, including training the first equalizer on a second training signal transmitted from the second PHY transceiver, and concurrently training the second equalizer on a first training signal transmitted from the first PHY transceiver.

Abstract: A physical layer transceiver for a wireline communications system includes a receive path for communicating signals received from the medium to a functional circuit, a transmit path for communicating signals received from the functional circuit onto the medium, and echo cancellation circuitry for cancelling from the receive path echoes of signals transmitted on the transmit path. The echo cancellation circuitry includes a plurality of high-dynamic-range filter segments, a plurality of low-dynamic-range filter segments, and control circuitry configured to detect on the receive path the echoes of the signals transmitted on the transmit path, classify each echo signal as having a low dynamic range or a high dynamic range, and deploy a high-dynamic-range segment to a location of an echo signal having a high dynamic range, and deploy a low-dynamic-range segment to a location of an echo signal having a low dynamic range.

Abstract: A network controller receives link metrics for network links on cables between network devices in a communication network. The link metrics include metrics indicative of crosstalk experienced by network links among the network links on cables. The network controller determines, based at least in part on the link metrics, respective link settings for respective network links among the network links. The link settings are determined to mitigate crosstalk experienced by the respective network links as a result of transmission of signals in at least some of the network links at baud rates that correspond to bandwidths that exceed maximum bandwidth ratings of respective cables of the corresponding ones of the network links. The network controller causes configuration of the respective network links based on the link settings to optimize performance across the plurality of network links in the communication network.

Abstract: A transmitter transmits a first signal via a first cable at a first baud rate. A receiver receives a second signal via the first cable concurrently with transmitting the first signal via the first cable. The second signal is transmitted by another device at a second baud. rate that is lower than both i) the first baud rate and ii) a third baud rate at which a third signal is being transmitted in a second cable that causes crosstalk in the second signal being received via the first cable. Reception of the second signal at the second baud rate that is lower than the third baud rate facilitates mitigation of the crosstalk in the second signal caused by transmission of the third signal in the second cable at the third baud rate.

Abstract: A physical layer transceiver, for connecting a host device to a wireline channel medium that is divided into a total number of link segments, includes a host interface for coupling to a host device, a line interface for coupling to the wireline channel medium, and feed-forward equalization (FFE) circuitry operatively coupled to the line interface to add back, into a signal, components that were scattered in time. Respective individual filter segments are selectably configurable, by adjustment of respective delay lines, to correspond to respective individual link segments. The FFE circuitry also includes control circuitry configured to detect a signal energy peak in at least one particular link segment and, upon detection of the signal energy peak in the particular link segment, configure a respective one of the respective individual filter segments, by adjustment of a respective delay line, to correspond to the respective particular link segment.

Abstract: A physical layer transceiver for a serial data channel includes receiver circuitry having a local clock. Received signals arrive on the channel according to a remote clock. Clock-data recovery circuitry aligns the local clock with the remote clock by correcting phase and frequency error between the local and remote clocks. The clock-data recovery circuitry includes digital phase error detection circuitry operating according to a digital clock to detect phase error between the local and remote clocks, analog phase rotation circuitry to correct the detected phase error, distribution circuitry to divide the detected phase error into multiple phase error steps, and an analog clock source configured to provide the local clock to the analog phase rotation circuitry, and to provide to the distribution circuitry a distribution clock that is slower than the local clock, to correct the local clock by at least one step during one digital clock period.

Abstract: An active noise cancellation system includes a sensor operable to sense environmental noise and generate a corresponding reference signal, a fixed noise cancellation filter including a predetermined model of the active noise cancellation system operable to generate an anti-noise signal, and a tunable noise cancellation filter operable to modify the anti-noise signal in accordance with stored coefficients, wherein the tunable noise cancellation filter is further operable to modify the stored coefficients in real-time based on user feedback and generate a tuned anti-noise signal that models tunable deviations from the predetermined noise model. A graphical user interface is operable to receive user adjustments of tunable parameters in real-time, the tunable parameters corresponding to at least one of the stored coefficients.

Abstract: An active noise cancellation system includes a sensor operable to sense environmental noise and generate a corresponding reference signal, a fixed noise cancellation filter including a predetermined model of the active noise cancellation system operable to generate an anti-noise signal, and a tunable noise cancellation filter operable to modify the anti-noise signal in accordance with stored coefficients, wherein the tunable noise cancellation filter is further operable to modify the stored coefficients in real-time based on user feedback and generate a tuned anti-noise signal that models tunable deviations from the predetermined noise model. A graphical user interface is operable to receive user adjustments of tunable parameters in real-time, the tunable parameters corresponding to at least one of the stored coefficients.

Abstract: A system and method for training an equalizer structure of a digital data communication system in order to compensate for transmission impairments on the line particularly wherein one transceiver of the two is resource limited. In an exemplary embodiment, a line card provides equalization feedback to a modem whenever changes to the equalization are beneficial. The line card calculates a limited number of tap correction factors at one time, transfers the tap correction factors to the modem, and then trains up a new set of tap correction factors. The modem incorporates the tap correction factors into the taps of the corresponding frequency ranges. The process iterates indefinitely through the transmission resulting in a very high quality equalization.

Abstract: When logos or other imagery are to be added to compressed digital video bitstreams, certain constraints are applied to the encoder that generates the original compressed bitstream to enable a video logo processor (e.g., at a local broadcaster) to insert logo-inserted encoded data into the bitstream without placing substantial processing demands on the video logo processor. In one embodiment, areas where logos can be inserted are identified and the encoder is not allowed to use image data within those logo areas as reference data when performing motion-compensated inter-frame differencing for pixels outside of the logo areas. Preferably, the compressed data corresponding to the desired location for logo insertion are extracted from the compressed bitstream and replaced by logo-inserted encoded data. As a result, logos can be inserted into compressed digital video bitstreams without having to completely decode and re-encode the bitstreams, while maintaining the overall quality of the video display.

Abstract: When adding logos or other imagery to compressed digital video bitstreams, logos are inserted into only disposable frames. Since disposable frames are never used as references for decoding other frames, the logos can be added without adversely affecting the playback of any other frames. Preferably, the compressed data for disposable-frame macroblocks corresponding to the desired location for logo insertion are extracted from the compressed bitstream and replaced by intra-encoded logo-inserted data. As a result, logos can be inserted into compressed digital video bitstreams without having to completely decode and re-encode the bitstreams, while maintaining the overall quality of the video display.

Abstract: A process and apparatus for converting an MPEG-2 bitstream into an SMPTE-259 compatible bitstream is characterized by a frame rate converter which is selectively enabled to drop every 1001st frame of the incoming MPEG-2 bitstream depending on the input bitstream frame rate. If the input bitstream frame rate is other than 29.97 or 59.94 Hz, a frame dropper is enabled to discard every 1001st frame. The present converter can convert many different types of input bitstreams, such as all I types, IPIP types, or complex GOP types containing I, P, and B frames. The enabled frame dropper will drop either the I or P frame if it occurs as the 1001st frame, but if the 1001st frame is of the B frame type, the pixel information of the B frame is dropped. This produces a minimum in loss of information during the conversion. The format converter allows existing SMPTE-259 routing equipment to route and utilize MPEG-2 bitstreams, such as HDTV applications.

Abstract: A current picture partitioned into a plurality of partitions is received and encoded by determining a total target number of encoded bits for the current picture to avoid overflow or underflow of a video buffer verifier (VBV) maintained by an encoder. The encoder determines a local target number of encoded bits for each partition of the current picture, in accordance with the total target number. A plurality of partition encoders encode each partition, respectively, in accordance with the local target number for said each partition, wherein each partition encoder maintains a local VBV having a local VBV fullness, to monitor local underflow or overflow conditions.