Patents by Inventor Rahul A. Apte

Rahul A. Apte has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11342796
    Abstract: Methods, systems, and techniques for safely controlling wireless charging in the presence of a foreign object are presented. A method includes determining a power difference between a power transmitted by a wireless charger and a power received by an electronic device, determining a level of misalignment of the electronic device with respect to the wireless charger; estimating an amount of power difference due to the level of misalignment of the electronic device with respect to the wireless charger, adjusting a power difference threshold for the wireless charger based on the estimated amount of power difference, and controlling operation of the wireless charger based on the power difference and the adjusted power difference threshold.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: May 24, 2022
    Assignee: Google LLC
    Inventors: Qi Tian, Veera Venkata Siva Nagesh Polu, Liang Jia, Liyu Yang, Jae-won Hwang, Rahul Apte, Srikanth Lakshmikanthan, Srenik Suresh Mehta, Robert Thomas Shone
  • Patent number: 11171522
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer-storage media, for improving wireless charging. In some implementations, an electronic device determines a power demand of the electronic device. The electronic device includes a wireless power receiver including a wireless power receiving coil configured to receive power through inductive coupling with a wireless charge. The electronic device determines an operating voltage or operating frequency for the wireless charger based on the power demand of the electronic device. The electronic device sends, to the wireless charger, data indicating the operating voltage or operating frequency for the wireless charger.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: November 9, 2021
    Assignee: Google LLC
    Inventors: Liang Jia, Qi Tian, Liyu Yang, Veera Venkata Siva Nagesh Polu, Srikanth Lakshmikanthan, Rahul Apte, Jae-won Hwang, Srenik Suresh Mehta
  • Publication number: 20200343777
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer-storage media, for improving wireless charging. In some implementations, an electronic device determines a power demand of the electronic device. The electronic device includes a wireless power receiver including a wireless power receiving coil configured to receive power through inductive coupling with a wireless charge. The electronic device determines an operating voltage or operating frequency for the wireless charger based on the power demand of the electronic device. The electronic device sends, to the wireless charger, data indicating the operating voltage or operating frequency for the wireless charger.
    Type: Application
    Filed: April 24, 2019
    Publication date: October 29, 2020
    Inventors: Liang Jia, Qi Tian, Liyu Yang, Veera Venkata Siva Nagesh Polu, Srikanth Lakshmikanthan, Rahul Apte, Jae-won Hwang, Srenik Suresh Mehta
  • Publication number: 20200083754
    Abstract: Methods, systems, and techniques for safely controlling wireless charging in the presence of a foreign object are presented. A method includes determining a power difference between a power transmitted by a wireless charger and a power received by an electronic device, determining a level of misalignment of the electronic device with respect to the wireless charger; estimating an amount of power difference due to the level of misalignment of the electronic device with respect to the wireless charger, adjusting a power difference threshold for the wireless charger based on the estimated amount of power difference, and controlling operation of the wireless charger based on the power difference and the adjusted power difference threshold.
    Type: Application
    Filed: September 7, 2018
    Publication date: March 12, 2020
    Inventors: Qi Tian, Veera Venkata Siva Nagesh Polu, Liang Jia, Liyu Yang, Jae-won Hwang, Rahul Apte, Srikanth Lakshmikanthan, Srenik Suresh Mehta, Robert Thomas Shone
  • Patent number: 8437721
    Abstract: A frequency synthesizer within an FM receiver employs a Phase-Locked Loop (PLL) to generate a Local Oscillator (LO) signal. The LO signal is supplied to a mixer. The FM receiver also includes jammer detection functionality. If no jammer is detected, then the loop bandwidth of the PLL is set to have a relatively high value, thereby favoring suppression of in-band residual FM. If a jammer is detected, then the loop bandwidth of the PLL is set to have a relatively low value, thereby favoring suppression of out-of-band SSB phase noise. By adaptively changing loop bandwidth depending on whether a jammer is detected, performance requirements on sub-circuits within the PLL can be relaxed while still satisfying in-band residual FM and out-of-band SSB phase noise requirements. By allowing the VCO of the PLL to generate more phase noise due to the adaptive changing of loop bandwidth, VCO power consumption can be reduced.
    Type: Grant
    Filed: April 26, 2009
    Date of Patent: May 7, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Yi Zeng, Tzu-wang Pan, I-Hsiang Lin, Jeremy Dunworth, Pushp Trikha, Rahul Apte
  • Patent number: 8373509
    Abstract: Techniques to improve low noise amplifiers (LNAs) with noise canceling are described. LNA includes a first and a second amplifier which work together to noise cancel the noise generated at an input stage circuit. The input stage circuit receives an RF signal and is characterized by a first node and a second node. The first amplifier converts a noise voltage at the first node into a first noise current at an output of the first amplifier. The second amplifier is directly coupled to the output of the first amplifier and provides noise canceling by summing the first noise current with a second noise current generated by the second amplifier as a function of the noise voltage at the second node. The proposed techniques eliminate the need for large ac coupling capacitors and reduce the die size occupied by the LNA.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: February 12, 2013
    Assignee: QUALCOMM, Incorporated
    Inventors: Yi Zeng, Xiaoyong Li, Rahul A Apte
  • Patent number: 8355752
    Abstract: A cellular telephone includes cellular telephone circuitry and an FM receiver. An FM signal being received is downconverted by a mixer. The downconverted signal is processed to generate an FM signal that is supplied to a digital IF filter. If a blocker emitted by the cellular telephone circuitry would interfere with receiving of the FM signal due to interaction of an LO harmonic with the blocker if a conventional LO frequency were used, then a different LO frequency is used. Subsequent processing of the downconverted FM signal (for example, by a digital complex conjugate selector and an IF rotator) results in the signal supplied to the digital IF filter having the same center frequency as the digital IF filter despite the use of the different LO frequency. In some embodiments, the LO is shifted by different amounts depending on cellular telephone mode and on the FM signal.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: January 15, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Pushp Trikha, Luca Blessent, Xiaoyong Li, Rahul A. Apte
  • Patent number: 8254849
    Abstract: An FM radio with a wide frequency range operates in a cell phone without interfering with the VCO of the RF transceiver. The FM transceiver generates a VCO signal whose frequency varies by less than ±7% from the midpoint of a narrow first range. A synthesizer signal is generated by dividing the VCO frequency by a first divisor such that the synthesizer frequency varies over a lower frequency second range. The VCO frequency is also divided by a second divisor such that the synthesizer frequency varies over a third range. The upper limit of the second range falls at the lower limit of the third range. The lower limit of the second range is 85.5 MHz and the upper limit of the third range is 108.0 MHz. By also using a third divisor, a synthesizer signal with a range of 76-108 MHz is generated from the narrow first frequency range.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: August 28, 2012
    Assignee: QUALCOMM Incorporated
    Inventors: Tzu-wang Pan, Yi Zeng, I-Hsiang Lin, Pushp K. Trikha, Jeremy D. Dunworth, Rahul Apte
  • Publication number: 20120206208
    Abstract: Techniques to improve low noise amplifiers (LNAs) with noise canceling are described. LNA includes a first and a second amplifier which work together to noise cancel the noise generated at an input stage circuit. The input stage circuit receives an RF signal and is characterized by a first node and a second node. The first amplifier converts a noise voltage at the first node into a first noise current at an output of the first amplifier. The second amplifier is directly coupled to the output of the first amplifier and provides noise canceling by summing the first noise current with a second noise current generated by the second amplifier as a function of the noise voltage at the second node. The proposed techniques eliminate the need for large ac coupling capacitors and reduce the die size occupied by the LNA.
    Type: Application
    Filed: February 9, 2012
    Publication date: August 16, 2012
    Applicant: QUALCOMM INCORPORATED
    Inventors: Yi Zeng, Xiaoyong Li, Rahul A. Apte
  • Patent number: 8138835
    Abstract: Techniques to improve low noise amplifiers (LNAs) with noise canceling are described. LNA includes a first and a second amplifier which work together to noise cancel the noise generated at an input stage circuit. The input stage circuit receives an RF signal and is characterized by a first node and a second node. The first amplifier converts a noise voltage at the first node into a first noise current at an output of the first amplifier. The second amplifier is directly coupled to the output of the first amplifier and provides noise canceling by summing the first noise current with a second noise current generated by the second amplifier as a function of the noise voltage at the second node. The proposed techniques eliminate the need for large ac coupling capacitors and reduce the die size occupied by the LNA. The elimination of ac coupling capacitors between amplification stages of the LNA allows current reuse resulting in reduced current consumption.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: March 20, 2012
    Assignee: QUALCOMM, Incorporated
    Inventors: Yi Zeng, Xiaoyong Li, Rahul A Apte
  • Publication number: 20110193635
    Abstract: Techniques to improve low noise amplifiers (LNAs) with noise canceling are described. LNA includes a first and a second amplifier which work together to noise cancel the noise generated at an input stage circuit. The input stage circuit receives an RF signal and is characterized by a first node and a second node. The first amplifier converts a noise voltage at the first node into a first noise current at an output of the first amplifier. The second amplifier is directly coupled to the output of the first amplifier and provides noise canceling by summing the first noise current with a second noise current generated by the second amplifier as a function of the noise voltage at the second node. The proposed techniques eliminate the need for large ac coupling capacitors and reduce the die size occupied by the LNA. The elimination of ac coupling capacitors between amplification stages of the LNA allows current reuse resulting in reduced current consumption.
    Type: Application
    Filed: June 8, 2010
    Publication date: August 11, 2011
    Applicant: QUALCOMM INCORPORATED
    Inventors: Yi Zeng, Xiaoyong Li, Rahul A. Apte
  • Patent number: 7902923
    Abstract: Techniques for integrating a common-source and common-gate amplifier topology in a single amplifier design. In one aspect, an input voltage is provided to both a common-source amplifier and a common-gate amplifier. The output voltages of the common-source amplifier and the common-gate amplifier are provided to a difference block for generating a single-ended voltage proportional to the difference between the output voltages. When applied to the design of, e.g., low-noise amplifiers (LNA's), the disclosed techniques may offer improved noise performance over the prior art.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: March 8, 2011
    Assignee: QUALCOMM, Incorporated
    Inventors: Xiaoyong Li, Rahul A. Apte
  • Publication number: 20110009161
    Abstract: A cellular telephone includes cellular telephone circuitry and an FM receiver. An FM signal being received is downconverted by a mixer. The downconverted signal is processed to generate an FM signal that is supplied to a digital IF filter. If a blocker emitted by the cellular telephone circuitry would interfere with receiving of the FM signal due to interaction of an LO harmonic with the blocker if a conventional LO frequency were used, then a different LO frequency is used. Subsequent processing of the downconverted FM signal (for example, by a digital complex conjugate selector and an IF rotator) results in the signal supplied to the digital IF filter having the same center frequency as the digital IF filter despite the use of the different LO frequency. In some embodiments, the LO is shifted by different amounts depending on cellular telephone mode and on the FM signal.
    Type: Application
    Filed: November 2, 2009
    Publication date: January 13, 2011
    Applicant: QUALCOMM Incorporated
    Inventors: Pushp Trikha, Luca Blessent, Xiaoyong Li, Rahul A. Apte
  • Publication number: 20100273442
    Abstract: A frequency synthesizer within an FM receiver employs a Phase-Locked Loop (PLL) to generate a Local Oscillator (LO) signal. The LO signal is supplied to a mixer. The FM receiver also includes jammer detection functionality. If no jammer is detected, then the loop bandwidth of the PLL is set to have a relatively high value, thereby favoring suppression of in-band residual FM. If a jammer is detected, then the loop bandwidth of the PLL is set to have a relatively low value, thereby favoring suppression of out-of-band SSB phase noise. By adaptively changing loop bandwidth depending on whether a jammer is detected, performance requirements on sub-circuits within the PLL can be relaxed while still satisfying in-band residual FM and out-of-band SSB phase noise requirements. By allowing the VCO of the PLL to generate more phase noise due to the adaptive changing of loop bandwidth, VCO power consumption can be reduced.
    Type: Application
    Filed: April 26, 2009
    Publication date: October 28, 2010
    Applicant: QUALCOMM Incorporated
    Inventors: Yi Zeng, Tzu-wang Pan, I-Hsiang Lin, Jeremy Dunworth, Pushp Trikha, Rahul Apte
  • Publication number: 20100255802
    Abstract: An FM radio with a wide frequency range operates in a cell phone without interfering with the VCO of the RF transceiver. The FM transceiver generates a VCO signal whose frequency varies by less than ±7% from the midpoint of a narrow first range. A synthesizer signal is generated by dividing the VCO frequency by a first divisor such that the synthesizer frequency varies over a lower frequency second range. The VCO frequency is also divided by a second divisor such that the synthesizer frequency varies over a third range. The upper limit of the second range falls at the lower limit of the third range. The lower limit of the second range is 85.5 MHz and the upper limit of the third range is 108.0 MHz. By also using a third divisor, a synthesizer signal with a range of 76-108 MHz is generated from the narrow first frequency range.
    Type: Application
    Filed: April 2, 2009
    Publication date: October 7, 2010
    Applicant: QUALCOMM Incorporated
    Inventors: Tzu-wang Pan, Yi Zeng, I-Hsiang Lin, Pushp K. Trikha, Jeremy D. Dunworth, Rahul Apte
  • Publication number: 20100237942
    Abstract: Techniques for integrating a common-source and common-gate amplifier topology in a single amplifier design. In one aspect, an input voltage is provided to both a common-source amplifier and a common-gate amplifier. The output voltages of the common-source amplifier and the common-gate amplifier are provided to a difference block for generating a single-ended voltage proportional to the difference between the output voltages. When applied to the design of, e.g., low-noise amplifiers (LNA's), the disclosed techniques may offer improved noise performance over the prior art.
    Type: Application
    Filed: March 19, 2009
    Publication date: September 23, 2010
    Applicant: QUALCOMM INCORPORATED
    Inventors: Xiaoyong Li, Rahul A. Apte