Abstract: A current generator circuit and a method to provide a negative higher order temperature coefficient, nHOTC, current is presented. The circuit has a current source to provide a reference current. Furthermore, the circuit has a MOS current mirror to derive a current at an output of the MOS current mirror from the reference current at an input of the MOS current mirror. In addition, the circuit has a bipolar current mirror to derive a current at an output of the bipolar current mirror from the reference current at an input of the bipolar current mirror. The output of the MOS current mirror and the output of the bipolar current mirror are arranged in series, to provide a combined current. The bipolar current mirror exhibits a mirror ratio 1:k, with 0<k<1. Furthermore, the circuit has an output to provide the nHOTC current based on the combined current.

Abstract: Circuits and methods to compensate leakage current of a LDO regulator are disclosed. The compensation is achieved by a temperature dependent sink current generation, matched with its temperature dependency characteristic to the LDO regulator output transistor leakage, which has a nearly zero current consumption increase of about 50 nA at room temperature and starts sink current at temperatures about above 85 to 125 degrees Celsius, which is corresponding to a range of temperature wherein leakage currents come into account.

Abstract: Circuits and methods to compensate leakage current of a LDO regulator are disclosed. The compensation is achieved by a temperature dependent sink current generation, matched with its temperature dependency characteristic to the LDO regulator output transistor leakage, which has a nearly zero current consumption increase of about 50 nA at room temperature and starts sink current at temperatures about above 85 to 125 degrees Celsius, which is corresponding to a range of temperature wherein leakage currents come into account.

Abstract: Circuits and methods to compensate leakage current of a LDO are disclosed. The compensation is achieved by a temperature dependent sink current generation, which has a nearly zero current consumption increase of about 50 nA at room temperature and starts sink current at temperatures about above 85 to 100 degrees Celsius, which is corresponding to a range of temperature wherein leakage currents come into account.

Abstract: Circuits and methods to compensate leakage current of a LDO are disclosed.

Abstract: A circuit and a method are given, to realize an electronic system for combined usage at differing voltage ranges as defined by a low-voltage range for operating standard CMOS devices and a high-voltage range exceeding said standard CMOS low-voltage operating range significantly by multiples and thus necessarily utilizing input ports with an intrinsic high-voltage protection feature. Said circuit and method are designed in order to be implemented with a very economic number of components, capable to be realized with standard modern integrated circuit technologies in CMOS technology.

Abstract: The supply voltage of an on-chip flash memory is regulated with two feedback loops. One loop comprises the flash memory, a register, and a voltage regulator with bandgap reference to regulate the supply voltage. The other loop comprises the flash memory, another register, an amplifier with bandgap reference, and comparators to monitor the supply voltage and adjust the threshold of the signals which control the operation of the flash memory and registers. The calibration data controls variable resistive means in the feedback paths of the voltage regulator and in the calibration of the threshold values of the control signals. Calibration data is held in the registers when the supply voltage is out-of-range to prevent self-start up.

Abstract: A circuit and a method are given, to realize an electronic system for combined usage at differing voltage ranges as defined by a low-voltage range for operating standard CMOS devices and a high-voltage range exceeding said standard CMOS low-voltage operating range significantly by multiples and thus necessarily utilizing input ports with an intrinsic high-voltage protection feature. Said circuit and method are designed in order to be implemented with a very economic number of components, capable to be realized with standard modern integrated circuit technologies in CMOS technology.

Abstract: The supply voltage of an on-chip flash memory is regulated with two feedback loops. One loop comprises the flash memory, a register, and a voltage regulator with bandgap reference to regulate the supply voltage. The other loop comprises the flash memory, another register, an amplifier with bandgap reference, and comparators to monitor the supply voltage and adjust the threshold of the signals which control the operation of the flash memory and registers. The calibration data controls variable resistive means in the feedback paths of the voltage regulator and in the calibration of the threshold values of the control signals. Calibration data is held in the registers when the supply voltage is out-of-range to prevent self-start up.

Abstract: A system-on-a-chip (SOC) in CMOS technology capable to support high voltage applications has been achieved. The single chip system of the present invention comprises high-voltage circuitry, a complete micro-controller system including all timing control, interrupt logic, flash EEPROM program memory, RAM, flash EEPROM data memory and I/O necessary to implement dedicated control functions, and a core and system peripheral bus. A preferred embodiment of the invention is shown driving a DC-motor in a H-bridge configuration, having an AMR-position detection and control. A pulse width modulation (PWM) is applied to high-voltage (30 to 60 Volts or in lower ranges less than 30 Volts) CMOS buffers for steering CMOS-FETs or relays of the motor H-bridge.

Abstract: A system-on-a-chip (SOC) in CMOS technology capable to support high voltage applications has been achieved. The single chip system of the present invention comprises high-voltage circuitry, a complete micro-controller system including all timing control, interrupt logic, flash EEPROM program memory, RAM, flash EEPROM data memory and I/O necessary to implement dedicated control functions, and a core and system peripheral bus. A preferred embodiment of the invention is shown driving a DC-motor in a H-bridge configuration, having an AMR-position detection and control. A pulse width modulation (PWM) is applied to high-voltage (30 to 60 Volts or in lower ranges less than 30 Volts) CMOS buffers for steering CMOS-FETs or relays of the motor H-bridge.

Abstract: A circuit and method are given, to realize a high voltage comparator, which generates an output signal for follow-up processing in the low-voltage domain. The high-voltage comparison task is essentially replaced by a current comparison, implemented as a combination of a voltage to current transforming stage with a CMOS current comparator circuit, where only very few parts are working in the high voltage domain. Using the intrinsic advantages of that solution the circuit of the invention is manufactured with standard CMOS technology and only four discrete or integrated extended drain MOS components at low cost. This solution reduces the complexity of the circuit and in consequence also power consumption and manufacturing cost.

Abstract: A circuit and method are given, to realize a high voltage output driver within a closed regulator loop with slew rate control, insensitive against supply voltage variations. The high-voltage front-end, essentially a slope detector, is implemented as a combination of a voltage-current with a current-voltage transformer circuit, where only very few parts are working in the high voltage domain. Using the intrinsic advantages of that solution the circuit of the invention is manufactured with standard CMOS technology and only two discrete or integrated extended drain MOS components at low cost.