Abstract: A circuit for the conversion of an unregulated input voltage (UE) into a regulated DC output voltage (UA) is specified, with which the input voltage (UE) can assume both a higher and a lower value than the desired output voltage (UA). In addition to a set/actual value comparator (SIV), a current simulation (SNB) is provided, which simulates the current (JL) in the storage choke (L2) during charging as capacitor voltage, a common driver circuit (TRS), designed as switched constant current source, for both semiconductor switches (V1, V2), an input voltage monitoring (ESU), which switches off the switched-mode regulator when there is too low an input voltage (UE) and an output monitoring circuit (ASU), which reduces the set value of the regulating circuit on crossing in the downward direction of a selectable threshold.