Patents by Inventor Rajagopalan Ramaswamy

Rajagopalan Ramaswamy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10923651
    Abstract: In one embodiment, a SOT device is provided that replaces a traditional NM layer adjacent to a magnetic layer with a NM layer that is compatible with CMOS technology. The NM layer may include a CMOS-compatible composite (e.g., CuPt) alloy, a TI (e.g., Bi2Se3, BixSe1-x, Bi1-xSbx, etc.) or a TI/non-magnetic metal (e.g., Bi2Se3/Ag, BixSe1-x/Ag, Bi1-xSbx/Ag, etc.) interface, that provides efficient spin current generation. Spin current may be generated in various manners, including extrinsic SHE, TSS or Rashba effect.
    Type: Grant
    Filed: August 16, 2018
    Date of Patent: February 16, 2021
    Assignee: National University of Singapore
    Inventors: Rajagopalan Ramaswamy, Yi Wang, Shuyuan Shi, Hyunsoo Yang
  • Patent number: 10783944
    Abstract: In example embodiments, a SOT magnetic memory and operation method are provided that utilize SOT driven domain wall motion to achieve subsequent switching without the need for an external assist magnetic field. The magnetic memory includes a magnetic tunnel junction having a reference layer, a tunnel barrier layer and a free layer, where the tunnel barrier layer is positioned between the reference layer and free layer. A spin-orbit torque layer is disposed adjacent to the free layer. A pair of pinning site are positioned at a longitudinal end of the free layer and each has an opposite magnetization direction from the other. The SOT layer is configured to exert SOT and switch a magnetization direction of the free layer via domain wall motion in a direction of current flow when an electric current is passed through a length of the SOT layer.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: September 22, 2020
    Assignee: National University of Singapore
    Inventors: Jongmin Lee, Rajagopalan Ramaswamy, Hyunsoo Yang
  • Publication number: 20190244646
    Abstract: In example embodiments, a SOT magnetic memory and operation method are provided that utilize SOT driven domain wall motion to achieve subsequent switching without the need for an external assist magnetic field. The magnetic memory includes a magnetic tunnel junction having a reference layer, a tunnel barrier layer and a free layer, where the tunnel barrier layer is positioned between the reference layer and free layer. A spin-orbit torque layer is disposed adjacent to the free layer. A pair of pinning site are positioned at a longitudinal end of the free layer and each has an opposite magnetization direction from the other. The SOT layer is configured to exert SOT and switch a magnetization direction of the free layer via domain wall motion in a direction of current flow when an electric current is passed through a length of the SOT layer.
    Type: Application
    Filed: February 1, 2019
    Publication date: August 8, 2019
    Inventors: Jongmin Lee, Rajagopalan Ramaswamy, Hyunsoo Yang
  • Publication number: 20190058113
    Abstract: In one embodiment, a SOT device is provided that replaces a traditional NM layer adjacent to a magnetic layer with a NM layer that is compatible with CMOS technology. The NM layer may include a CMOS-compatible composite (e.g., CuPt) alloy, a TI (e.g., Bi2Se3, BixSe1-x, Bi1-xSbx, etc.) or a TI/non-magnetic metal (e.g., Bi2Se3/Ag, BixSe1-x/Ag, Bi1-xSbx/Ag, etc.) interface, that provides efficient spin current generation. Spin current may be generated in various manners, including extrinsic SHE, TSS or Rashba effect.
    Type: Application
    Filed: August 16, 2018
    Publication date: February 21, 2019
    Inventors: Rajagopalan Ramaswamy, Yi Wang, Shuyuan Shi, Hyunsoo Yang