Abstract: A method and apparatus for guaranteeing packet delivery times in an asynchronous network includes generating a global timing schedule to synchronize the communication between the terminals of a network and, in response to at least one trigger, transmitting and receiving data according to the generated global timing schedule. To optimize bandwidth utilization, more than one terminal may transmit data during a specific time slot of each time frame of the global timing schedule as long as no more than one terminal attempts to transmit data to a common other terminal.

Abstract: A method, apparatus and system for the synchronized combining of packet data in a network includes sorting data packets received during a predetermined time period into groups according to for which communications device of the network the received data packets are intended. The data packets in each of the groups intended for the respective communications devices are respectively time aligned and orthogonally combined. The respectively combined data packets intended for each of the specific communications devices are subsequently transmitted to the intended device using a single header and in a substantially compressed format.

Abstract: An approach for determining corrective predistortion functions includes maintaining a history of recent estimations of a plurality of corrective predistortion functions. Each of those functions corresponds to a respective signal characteristic. By determining a feature of each of those functions from the history, one of the corrective predistortion functions is selected for a next estimation based upon which of the functions has a feature within the history that satisfies a selected criteria. In a disclosed example, the function having the lowest number of estimations within a recent history is selected as the function to have the highest priority for a next estimation.

Abstract: Determining a predistortion function includes sampling a signal to obtain a plurality of capture sets within a single sampling window. Each of the capture sets is analyzed to determine whether it satisfies preselected criteria. Example criteria include desired characteristics of a capture set average power, capture set peak power and a number of peaks within a capture set. If any capture set within the sampling window satisfies all of the preselected criteria and has the highest number of peaks, that capture set will be used for determining a predistortion function. A multiple capture set selection module applies the preselected criteria for selecting an appropriate capture set for determining the predistortion function. The predistortion function is used for applying predistortion to a signal before that signal is processed by a distorting component that introduces distortion so that the predistortion can compensate for or cancel out such distortion.

Abstract: A corrective predistortion function is applied to a signal to compensate for or cancel out distortion that is introduced by a component that processes the signal. A disclosed example includes applying a corrective predistortion function to a transmitted signal used for wireless communications. A technique for selecting the corrective predistortion function includes determining a current power level of the signal. When the current power level is at or below a lift level between a maximum signal power level and a minimum signal power level, a corrective predistortion function corresponding to the lift level is applied to the signal. When the actual signal power level is above the lift level, a corrective predistortion function corresponding to the actual current power level is applied.

Abstract: A method and apparatus for guaranteeing packet delivery times in an asynchronous network includes generating a global timing schedule to synchronize the communication between the terminals of a network and, in response to at least one trigger, transmitting and receiving data according to the generated global timing schedule. To optimize bandwidth utilization, more than one terminal may transmit data during a specific time slot of each time frame of the global timing schedule as long as no more than one terminal attempts to transmit data to a common other terminal.

Abstract: A method and apparatus for guaranteeing packet delivery times in an asynchronous network includes generating a global timing schedule to synchronize the communication between the terminals of a network and, in response to at least one trigger, transmitting and receiving data according to the generated global timing schedule. To optimize bandwidth utilization, more than one terminal may transmit data during a specific time slot of each time frame of the global timing schedule as long as no more than one terminal attempts to transmit data to a common other terminal.

Abstract: A method and system for network terminal clock synchronization includes determining a respective round trip delay time from a master terminal to each slave terminal and offsetting the clock of each slave terminal by an amount proportional to the respective determined round trip delay time such that the master terminal and each of the slave terminals have substantially the same point of reference in time. The method and system further include, in response to a trigger signal, determining a respective offset between the master clock of the master terminal and the clocks of each of the slave terminals and offsetting the clocks of each of the slave terminals by an amount proportional to the determined respective offset to synchronize the clocks of each of the slave terminals to the master clock of the master terminal.

Abstract: Determining a predistortion function includes sampling a signal to obtain a plurality of capture sets within a single sampling window. Each of the capture sets is analyzed to determine whether it satisfies preselected criteria. Example criteria include desired characteristics of a capture set average power, capture set peak power and a number of peaks within a capture set. If any capture set within the sampling window satisfies all of the preselected criteria and has the highest number of peaks, that capture set will be used for determining a predistortion function. A multiple capture set selection module applies the preselected criteria for selecting an appropriate capture set for determining the predistortion function. The predistortion function is used for applying predistortion to a signal before that signal is processed by a distorting component that introduces distortion so that the predistortion can compensate for or cancel out such distortion.

Abstract: A corrective predistortion function is applied to a signal to compensate for or cancel out distortion that is introduced by a component that processes the signal. A disclosed example includes applying a corrective predistortion function to a transmitted signal used for wireless communications. A technique for selecting the corrective predistortion function includes determining a current power level of the signal. When the current power level is at or below a lift level between a maximum signal power level and a minimum signal power level, a corrective predistortion function corresponding to the lift level is applied to the signal. When the actual signal power level is above the lift level, a corrective predistortion function corresponding to the actual current power level is applied.

Abstract: An approach for determining corrective predistortion functions includes maintaining a history of recent estimations of a plurality of corrective predistortion functions. Each of those functions corresponds to a respective signal characteristic. By determining a feature of each of those functions from the history, one of the corrective predistortion functions is selected for a next estimation based upon which of the functions has a feature within the history that satisfies a selected criteria. In a disclosed example, the function having the lowest number of estimations within a recent history is selected as the function to have the highest priority for a next estimation.

Abstract: A method, apparatus and system for the synchronized combining of packet data in a network includes sorting data packets received during a predetermined time period into groups according to for which communications device of the network the received data packets are intended. The data packets in each of the groups intended for the respective communications devices are respectively time aligned and orthogonally combined. The respectively combined data packets intended for each of the specific communications devices are subsequently transmitted to the intended device using a single header and in a substantially compressed format.

Abstract: A method and apparatus for guaranteeing packet delivery times in an asynchronous network includes generating a global timing schedule to synchronize the communication between the terminals of a network and, in response to at least one trigger, transmitting and receiving data according to the generated global timing schedule. To optimize bandwidth utilization, more than one terminal may transmit data during a specific time slot of each time frame of the global timing schedule as long as no more than one terminal attempts to transmit data to a common other terminal.

Abstract: A method and system for network terminal clock synchronization includes determining a respective round trip delay time from a master terminal to each slave terminal and offsetting the clock of each slave terminal by an amount proportional to the respective determined round trip delay time such that the master terminal and each of the slave terminals have substantially the same point of reference in time. The method and system further include, in response to a trigger signal, determining a respective offset between the master clock of the master terminal and the clocks of each of the slave terminals and offsetting the clocks of each of the slave terminals by an amount proportional to the determined respective offset to synchronize the clocks of each of the slave terminals to the master clock of the master terminal.

Abstract: A buffer (4) has a read and write control (8, 7), an input (6), an output (5), and a transfer port (9). An SCSI interface (20) is coupled to port (9) and the read/write control (8, 7). The SCSI interface (20) implements transfer commands for transfers via the port 9 with an undefined delay. An RS 422 interface is coupled to the read/write control (8) and implements transfer commands for transfers via the input 6 and output 5, the commands being implemented with a small, defined delay synchronously with a video sync signal (SYNC).

Abstract: A data compression apparatus is described which applies a dynamically variable degree of quantisation Q.sub.s to input data so as to control blocks of output data to have a predetermined maximum size. The dynamic control can be carried out on an inter-block basis or an intra-block basis. An overflow detector is provided for inserting an overflow indicator within blocks of compressed data to indicate when overflow has occurred.

Abstract: A serial data coding system is described in which a state machine (FIG. 5) is provided having a plurality of branching hierarchies N, N+1 of states each corresponding to a different decoding table. Depending upon each received bit of serial data, the state machine moves through these branching hierarchies of states until states 88 corresponding to valid codes are reached whereupon a valid code is decoded and the state machine reset to the start of that branching hierarchy. If it is desired to move between branching hierarchies, then an internal table selecting word is inserted into the stream of serial data to move the state machine into a table incrementing state 90 where a jump to another branching hierarchy of states may be made. In order to cope with an externally applied switching signal Y/C for switching the state machine between branching hierarchies, the state machine is first moved into one of a plurality of transfer states A, C, D etc.

Abstract: A storage mechanism utilizing a single data recorder from which multiple channels of compressed video data may be simultaneously accessed. The data access to and from the data recorder via a single data access path takes place at a higher data rate (f.sub.1, f.sub.2) than the data rate (f.sub.3, f.sub.4) at which that compressed data needs to be decoded to support a video signal. A video router is used to direct the reproduced data stored within two data channel buffers to respective JPEG decoders where they are decompressed into a signal suitable for driving two digital monitors. In operation, a segment of compressed video data for one channel is recovered from the data recorder and stored within one of the buffers from which it is continuously read at a lower data rate (f.sub.3, f.sub.4). The data recorder then cues to another part of the medium from which data for the second channel is reproduced and stored within another buffer. The process is then repeated.

Abstract: A digital video tape recording/playback system having a plurality of recording heads (A, B, C, D) on a rotating head mechanism 94 for recording slanting tracks 108 which extend diagonally across a tape 82 provides processing of video signals in a plurality of data processing channels with selective connection of the data processing channels to the recording heads such that data from a plurality of data processing channels are stored in respective portions of a slanting track (A+/A-; B+/B-; C+/C-; D+/D-). The data in each data processing channel and recorded in each track portion is sampled with a substantially even distribution over a field of video signals to provide for effective concealment of recording/playback errors. Preferably, two data processing channels are recorded on each track, the respective portions being located in upper and lower portions of the tape, respectively.

Abstract: A serial data decoding system is described in which a state machine (FIG. 5) is provided having a plurality of branching hierarchies of states, each branching hierarchy of states corresponding to a different decoding table. The state machine incorporates a memory 72 storing control data words (FIG. 7). A latch 74 stores the most recent control data word to be output from the memory. The memory 72 is addressed with a read address formed from a concatenation of the latched value 84, a table selecting word 86, Y/C and a received bit of serial data. When the state machine enters a state 88 corresponding to valid code, the current control data word is output as an identifier of that valid code.