Abstract: An apparatus to facilitate video motion smoothing is disclosed. The apparatus comprises one or more processors including a graphics processor, the one or more processors including circuitry configured to receive a video stream, decode the video stream to generate a motion vector map and a plurality of video image frames, analyze the motion vector map to detect a plurality of candidate frames, wherein the plurality of candidate frames comprise a period of discontinuous motion in the plurality of video image frames and the plurality of candidate frames are determined based on a classification generated via a convolutional neural network (CNN), generate, via a generative adversarial network (GAN), one or more synthetic frames based on the plurality of candidate frames, insert the one or more synthetic frames between the plurality of candidate frames to generate up-sampled video frames and transmit the up-sampled video frames for display.

Abstract: In at least one embodiment described herein, an apparatus is provided that can include means for communicating a latency tolerance value for a device connected to a platform from a software latency register if a software latency tolerance register mode is active. The apparatus may also include means for communicating the latency tolerance value from a hardware latency register if a host controller is active. The latency tolerance value can be sent to a power management controller. More specific examples can include means for communicating a latency tolerance value from the software latency register if the software latency tolerance register mode is not active and the host controller is not active. The apparatus can also include means for mapping a resource space in the software latency register for the device using a BIOS/platform driver. The mapping can be achieved using an advanced configuration and power interface device description.

Abstract: In at least one embodiment described herein, an apparatus is provided that can include means for communicating a latency tolerance value for a device connected to a platform from a software latency register if a software latency tolerance register mode is active. The apparatus may also include means for communicating the latency tolerance value from a hardware latency register if a host controller is active. The latency tolerance value can be sent to a power management controller. More specific examples can include means for communicating a latency tolerance value from the software latency register if the software latency tolerance register mode is not active and the host controller is not active. The apparatus can also include means for mapping a resource space in the software latency register for the device using a BIOS/platform driver. The mapping can be achieved using an advanced configuration and power interface device description.

Abstract: An apparatus, system, and method are disclosed. In one embodiment, the apparatus includes a virtualization engine on a computer platform. The virtualization engine can intercept multiple data transfer schedules from multiple virtual machines fetched from a memory by a physical Universal Serial Bus (USB) host controller on the computer platform. The virtualization engine also can merge the multiple fetched data transfer schedules into a merged data transfer schedule. The virtualization engine also can send the merged data transfer schedule to the physical USB host controller.

Abstract: A computer system provides a program access to a first register during real mode operation by using an index register and a data register, wherein the index register and the data register are located in real mode memory space and the first register is located outside of real mode memory space.

Abstract: A device within a system, or an individual function of the device, may be reset to a known state while all other devices in the system or other functions of the device that are not being reset remain operational.

Abstract: Provided are a method, system and program for effecting an operating system mode change from one mode to another. In one embodiment, the operating system in one mode is placed in a sleep state in which volatile memory remains active. In booting an operating system from the sleep state, a flag may be detected indicating an operating system mode transfer request. In response, contents of a selected range of volatile memory allocated to the first operating system mode may be swapped with the contents of a selected range of a reserve portion of volatile memory allocated to the second operating system mode. Booting of an operating system in the second mode may be completed using the swapped contents of the volatile memory. Additional embodiments are described and claimed.

Abstract: A computer system provides a program access to a first register during real mode operation by using an index register and a data register, wherein the index register and the data register are located in real mode memory space and the first register is located outside of real mode memory space.

Abstract: Thermal, acoustic, and/or power data is collected about a platform, in its runtime environment. A component of the platform is selected, and predetermined data traffic is forced through the component while collecting the data. Characterization data for the platform is derived, from the collected data, and stored for access by a driver for the platform. Other embodiments are also described and claimed.

Abstract: A device to control memory bandwidth including a processing unit and a memory connected to the processing unit, the memory having a memory controller driver to issue at least one command based on a memory bandwidth requirement of another driver process. A memory controller to direct data to and from the memory. An active cooling device is connected to the processing unit and a thermal sensor.

Abstract: A device including a storage controller. A flash memory is connected to the storage controller. The flash memory to store flash memory data. A processing unit is connected to the storage controller. The processing unit to generate memory commands. A volatile memory is connected to the processing unit. A non-volatile memory is connected to the storage controller. The non-volatile memory to retain the flash memory data. A process to perform memory commands on the flash memory data retained in the non-volatile memory.

Abstract: A system and method to determine a presence of devices coupled to one a more peripheral buses in a system, and dynamically reducing power consumption of a subset of the devices that are present, based on correlating application/device association and a predetermined power source budget. In one embodiment, the reducing of the power consumption is performed dynamically by having an agent reduce the power limit in a device register(s) corresponding to the subset of devices. Furthermore, in one embodiment, the power resource budget is based at least in part on a user-selected power/performance level.

Abstract: Embodiments may include an interrupt handling system to generate software level interrupts in place of hardware level interrupts. The interrupt handling system may invoke an advanced configuration and power management interface (ACPI) and ACPI source language infrastructure, which provides for an SCI independent mechanism for invoking ACPI ASL code. The ACPI ASL code may in turn be used to alter and configure the power management of a computer system. This interrupt handling system allows for greater flexibility and efficiency by utilizing software based interrupts in place of hardware interrupt to decrease pin counts for chips and allow isolation of system function based on address ranges tied to interrupt sources.

Abstract: Embodiments include an interrupt handling system to generate an operating system visible interrupt such as a message signaled interrupt or interprocessor interrupt by an advanced configuration and power management interface (ACPI) and ACPI source language infrastructure. The interrupt handling system may be used to service hot keys. This interrupt handling system allows for easy upgrading of system functionality by updating a driver.

Abstract: A method and apparatus for updating the system configuration settings of a computer system Embodiments include a remote system configuration system that enables a user to update the system configuration of a target machine from a server machine over a network or similar communications system. Another embodiment includes a system configuration method using a bus master device to write system configuration data into a target computer system.

Abstract: Various embodiments of the invention relate to apportioning a total memory bandwidth available for a time period amongst a plurality of bandwidth requests according to a power managed profile. In addition, isochronous data transmission may be appended together and transmitted according to a data transmission policy, wherein the policy may include transmitting the appended isochronous data during an opportunistic data transmission, or during a time identified for transmitting a combined isochronous data transmission, but prior to a time delay compliance limit for isochronous requirements.

Abstract: Methods and apparatuses for dynamically loading and unloading power management code at runtime in a secure environment are described herein. In one embodiment, exemplary method includes loading authenticated/trusted power management code into a memory of a secure environment of an operating system (OS) and executing the power management code within the secure environment of the OS to handle power management tasks. Other methods and apparatuses are also described.

Abstract: Handling and processing of various capabilities of a plurality of platforms/systems. ACPI machine language (AML) code and device node structures are dynamically updated in a pre-OS execution environment after reading the General Purpose Inputs.