Patents by Inventor Rajesh Koul

Rajesh Koul has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140160595
    Abstract: Approaches for an emergency power off (EPO) power island, for saving critical data to non-volatile memory in the event of an EPO condition, for use in a hard-disk drive (HDD) storage device. The EPO power island includes a controller for detecting an EPO condition. A voltage regulator supplies power from spindle motor back EMF only to the EPO power island and to the non-volatile memory. Thus, the remainder of the hard drive controller (HDC) is isolated from the EPO power island so that it will not corrupt the data as the HDC's power supply is decaying. Using the power provided by the voltage regulator, the EPO power island transfers critical data from a memory internal to the island to a non-volatile memory external to the island, such as to a flash memory chip.
    Type: Application
    Filed: December 7, 2012
    Publication date: June 12, 2014
    Applicant: HGST NETHERLANDS B.V.
    Inventors: SRIDHAR CHATRADHI, RAJESH KOUL, RYAN MATTHEW SCHULZ, ANTHONY EDWIN WELTER
  • Patent number: 7653862
    Abstract: Embodiments of the present invention provide techniques for detecting and correcting encoded data. In one embodiment, a system for detecting and correcting errors in a plurality of data bits comprises a static memory configured to store a plurality of data bits; a systematic encoder configured to convert the plurality of data bits into a codeword; a systematic parity check encoder configured to convert the codeword into a syndrome; and a syndrome decoder configured to evaluate the syndrome based on preset criteria used to determine whether the syndrome corresponds to an uncorrectable error. A binary [16, 8, 5] code is used to encode the plurality of data bits.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: January 26, 2010
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Martin Hassner, Rajesh Koul
  • Publication number: 20070011598
    Abstract: Embodiments of the present invention provide techniques for detecting and correcting encoded data. In one embodiment, a system for detecting and correcting errors in a plurality of data bits comprises a static memory configured to store a plurality of data bits; a systematic encoder configured to convert the plurality of data bits into a codeword; a systematic parity check encoder configured to convert the codeword into a syndrome; and a syndrome decoder configured to evaluate the syndrome based on preset criteria used to determine whether the syndrome corresponds to an uncorrectable error. A binary [16, 8, 5] code is used to encode the plurality of data bits.
    Type: Application
    Filed: June 15, 2005
    Publication date: January 11, 2007
    Applicant: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Martin Hassner, Rajesh Koul