Abstract: Examples of a substrate support assembly are provided herein. In some examples, the substrate support assembly has a ceramic electrostatic chuck having a first side configured to support a substrate and a second side opposite the first side, wherein the ceramic electrostatic chuck includes an electrode embedded in the ceramic electrostatic chuck. The substrate support assembly has a cooling plate disposed under the second side of the ceramic electrostatic chuck, wherein the cooling plate includes an inner portion separated from an outer portion. The substrate support assembly has a bond layer coupling the ceramic electrostatic chuck to the cooling plate, wherein the bond layer is of a first material in the outer portion of the cooling plate and of a second material in the inner portion of the cooling plate, and wherein the first material has a greater thermal conductivity than that of the second material.

Abstract: A method, apparatus and system for processing a wafer in a plasma chamber system, which includes at least a plasma generating element and a biasing electrode, include generating a plasma in the plasma chamber system by applying a source RF source power to the plasma generating element for a first period of time of a pulse period of the RF source power, after the expiration of the first period of time, removing the source RF source power, after a delay after the removal of the RF source power, applying an RF bias signal to the biasing electrode for a second period of time to bias the generated plasma towards the wafer, and after the expiration of the second period of time, removing the RF bias signal from the biasing electrode before a next pulse period of the RF source power. The generated plasma biased toward the wafer is used to process the wafer.

Abstract: Embodiments of the disclosure provided herein include an apparatus and method for the plasma processing of a substrate in a processing chamber. More specifically, embodiments of this disclosure describe a biasing scheme that is configured to provide a pulsed-voltage (PV) waveform delivered from one or more pulsed-voltage (PV) generators to the one or more electrodes within the processing chamber. The plasma process(es) disclosed herein can be used to control the shape of an ion energy distribution function (IEDF) and the interaction of the plasma with a surface of a substrate during plasma processing.

Abstract: Embodiments of the disclosure provided herein include an apparatus and method for the plasma processing of a substrate in a processing chamber. More specifically, embodiments of this disclosure describe a biasing scheme that is configured to provide a radio frequency (RF) generated RF waveform from an RF generator to one or more electrodes within a processing chamber and a pulsed-voltage (PV) waveform delivered from one or more pulsed-voltage (PV) generators to the one or more electrodes within the processing chamber. The plasma process(es) disclosed herein can be used to control the shape of an ion energy distribution function (IEDF) and the interaction of the plasma with a surface of a substrate during plasma processing.

Abstract: A method, apparatus and system for processing a wafer in a plasma chamber system, which includes at least a plasma generating element and a biasing electrode, include generating a plasma in the plasma chamber system by applying a source RF source power to the plasma generating element for a first period of time of a pulse period of the RF source power, after the expiration of the first period of time, removing the source RF source power, after a delay after the removal of the RF source power, applying an RF bias signal to the biasing electrode for a second period of time to bias the generated plasma towards the wafer, and after the expiration of the second period of time, removing the RF bias signal from the biasing electrode before a next pulse period of the RF source power. The generated plasma biased toward the wafer is used to process the wafer.

Abstract: Embodiments described herein provide methods and apparatus used to control a processing result profile proximate to a circumferential edge of a substrate during the plasma-assisted processing thereof. In one embodiment, a substrate support assembly features a first base plate and a second base plate circumscribing the first base plate. The first and second base plates each have one or more respective first and second cooling disposed therein. The substrate support assembly further features a substrate support disposed on and thermally coupled to the first base plate, and a biasing ring disposed on and thermally coupled to the second base plate. Here, the substrate support and the biasing ring are each formed of a dielectric material. The substrate support assembly further includes an edge ring biasing electrode embedded in the dielectric material of the biasing ring and an edge ring disposed on the biasing ring.

Abstract: Embodiments described herein provide methods and apparatus used to control a processing result profile proximate to a circumferential edge of a substrate during the plasma-assisted processing thereof. In one embodiment, a substrate support assembly features a first base plate and a second base plate circumscribing the first base plate. The first and second base plates each have one or more respective first and second cooling disposed therein. The substrate support assembly further features a substrate support disposed on and thermally coupled to the first base plate, and a biasing ring disposed on and thermally coupled to the second base plate. Here, the substrate support and the biasing ring are each formed of a dielectric material. The substrate support assembly further includes an edge ring biasing electrode embedded in the dielectric material of the biasing ring and an edge ring disposed on the biasing ring.

Abstract: Systems and methods for creating arbitrarily-shaped ion energy distribution functions using shaped-pulse-bias. In an embodiment, a method includes applying a negative jump voltage to an electrode of a process chamber to set a wafer voltage for a wafer, modulating an amplitude of the wafer voltage to produce a train of groups of pulse bursts with different amplitudes, and repeating the modulating of the amplitude of the wafer voltage to repeat the train of the groups of pulse bursts to create an ion energy distribution function having more than one energy peak. In some embodiments, the negative jump voltage can include a single-cycle voltage waveform with a voltage ramp during an ion-current phase, in which the voltage ramp can be positive or negative and a duration of the ion-current phase can comprise more or less than fifty percent of a period of the waveform.

Abstract: An apparatus for confining plasma within a plasma processing chamber is provided. The plasma processing chamber includes a lower electrode for supporting a substrate and an upper electrode disposed over the lower electrode. The apparatus is a confinement ring that includes a lower horizontal section extending between an inner lower radius and an outer radius of the confinement ring. The lower horizontal section includes an extension section that bends vertically downward at the inner lower radius, and the lower horizontal section further includes a plurality of slots. The confinement ring further includes an upper horizontal section extending between an inner upper radius and the outer radius of the confinement ring and a vertical section that integrally connects the lower horizontal section with the upper horizontal section. The extension section of the lower horizontal section is configured to surround the lower electrode when installed in the plasma processing chamber.

Abstract: Embodiments of this disclosure describe a feedback loop that can be used to maintain a nearly constant sheath voltage and thus creating a mono-energetic IEDF at the surface of the substrate. The system described herein consequently enables a precise control over the shape of IEDF and the profile of the features formed in the surface of the substrate.

Abstract: Embodiments for processing a substrate in a pulsed plasma chamber are provided. A processing apparatus with two chambers, separated by a plate fluidly connecting the chambers, includes a continuous wave (CW) controller, a pulse controller, and a system controller. The CW controller sets the voltage and the frequency for a first radio frequency (RF) power source coupled to a top electrode. The pulse controller is operable to set voltage, frequency, ON-period duration, and OFF-period duration for a pulsed RF signal generated by a second RF power source coupled to the bottom electrode. The system controller is operable to regulate the flow of species between the chambers to assist in the negative-ion etching, to neutralize excessive positive charge on the wafer surface during afterglow in the OFF-period, and to assist in the re-striking of the bottom plasma during the ON -period.

Abstract: Embodiments of the disclosure provided herein include an apparatus and method for the plasma processing of a substrate in a processing chamber. More specifically, embodiments of this disclosure describe a biasing scheme that is configured to provide a radio frequency (RF) generated RF waveform from an RF generator to one or more electrodes within a processing chamber and a pulsed-voltage (PV) waveform delivered from one or more pulsed-voltage (PV) generators to the one or more electrodes within the processing chamber. The plasma process(es) disclosed herein can be used to control the shape of an ion energy distribution function (IEDF) and the interaction of the plasma with a surface of a substrate during plasma processing.

Abstract: Disclosed herein is a method and apparatus for controlling surface characteristics by measuring capacitance of a process kit ring. The method includes interfacing a ring with a jig assembly for measuring capacitance in at least a first location of the ring. The ring has that includes a top surface, a bottom surface, and an inner surface opposite an outer surface. At least the bottom surface has an external coating placed thereon. The method further includes contacting a measuring device to the first location on the outer surface proximate the bottom surface. The measuring device contacts an opening in the external coating to the body. The measuring device contacts a first conductive member that is electrically coupled to the ring. A capacitance is measured on the measuring device. The capacitance across the top surface is measured.

Abstract: Methods of semiconductor processing may include performing a process on a semiconductor substrate. The semiconductor substrate may be seated on a substrate support positioned within a processing region of a semiconductor processing chamber. The methods may include flowing a first backside gas through the substrate support at a first flow rate. The methods may include removing the semiconductor substrate from the processing region of the semiconductor processing chamber. The methods may include performing a plasma cleaning operation within the processing region of the semiconductor processing chamber. The methods may include flowing a second backside gas through the substrate support at a second flow rate. At least a portion of the second backside gas may flow into the processing region through accesses in the substrate support.

Abstract: Systems and methods for creating arbitrarily-shaped ion energy distribution functions using shaped-pulse-bias. In an embodiment, a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and modulating the amplitude of the wafer voltage to produce a predetermined number of pulses to determine an ion energy distribution function. In another embodiment a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and applying a ramp voltage to the electrode that overcompensates for ion current on the wafer or applying a ramp voltage to the electrode that undercompensates for ion current on the wafer.

Abstract: Embodiments of this disclosure describe a feedback loop that can be used to maintain a nearly constant sheath voltage and thus creating a mono-energetic IEDF at the surface of the substrate. The system described herein consequently enables a precise control over the shape of IEDF and the profile of the features formed in the surface of the substrate.

Abstract: Methods of semiconductor processing may include performing a process on a semiconductor substrate. The semiconductor substrate may be seated on a substrate support positioned within a processing region of a semiconductor processing chamber. The methods may include flowing a first backside gas through the substrate support at a first flow rate. The methods may include removing the semiconductor substrate from the processing region of the semiconductor processing chamber. The methods may include performing a plasma cleaning operation within the processing region of the semiconductor processing chamber. The methods may include flowing a second backside gas through the substrate support at a second flow rate. At least a portion of the second backside gas may flow into the processing region through accesses in the substrate support.

Abstract: Embodiments for processing a substrate in a pulsed plasma chamber are provided. A processing apparatus with two chambers, separated by a plate fluidly connecting the chambers, includes a continuous wave (CW) controller, a pulse controller, and a system controller. The CW controller sets the voltage and the frequency for a first radio frequency (RF) power source coupled to a top electrode. The pulse controller is operable to set voltage, frequency, ON-period duration, and OFF-period duration for a pulsed RF signal generated by a second RF power source coupled to the bottom electrode. The system controller is operable to regulate the flow of species between the chambers to assist in the negative-ion etching, to neutralize excessive positive charge on the wafer surface during afterglow in the OFF-period, and to assist in the re-striking of the bottom plasma during the ON-period.

Abstract: Disclosed herein is a method and apparatus for controlling surface characteristics by measuring capacitance of a process kit ring. The method includes interfacing a ring with a jig assembly for measuring capacitance in at least a first location of the ring. The ring has that includes a top surface, a bottom surface, and an inner surface opposite an outer surface. At least the bottom surface has an external coating placed thereon. The method further includes contacting a measuring device to the first location on the outer surface proximate the bottom surface. The measuring device contacts an opening in the external coating to the body. The measuring device contacts a first conductive member that is electrically coupled to the ring. A capacitance is measured on the measuring device. The capacitance across the top surface is measured.

Abstract: Embodiments herein provide plasma processing chambers and methods configured for fine-tuning and control over a plasma sheath formed during the plasma-assisted processing of a semiconductor substrate. Embodiments include a sheath tuning scheme, including plasma processing chambers and methods, which can be used to tailor one or more characteristics of a plasma sheath formed between a bulk plasma and a substrate surface. Generally, the sheath tuning scheme provides differently configured pulsed voltage (PV) waveforms to a plurality of bias electrodes embedded beneath the surface of a substrate support in an arrangement where each of the electrodes can be used to differentially bias a surface region of a substrate positioned on the support. The sheath tuning scheme disclosed herein can thus be used to adjust and/or control the directionality, and energy and angular distributions of ions that bombard a substrate surface during a plasma-assisted etch process.