Abstract: A method and apparatus generates thermal partitions for metal interconnects of an integrated circuit, based on interconnect self heat data and mutual heat data. Each of the thermal partitions includes data identifying thermally related interconnects and respective temperature values associated with each of the thermally related interconnects. Thermally related partitions that can be computed efficiently and simultaneously and the results then integrated using superposition for the full chips.

Abstract: Methods and media for analyzing electrical designs are provided. A method includes and the media are configured for providing or loading to an analysis tool a design that includes a plurality of cell instances of a standard cell and estimating a failure rate of the design using in context electrical parameters for the plurality of cell instances and a parameterized electromigration (EM) view of the standard cell. Another method includes providing a standard cell of a standard cell library and characterizing the standard cell to create a parameterized thermal model to compute a temperature of an internal structure of the standard cell and a parameterized current model to compute a current through the internal structure of the standard cell given in context electrical parameters.

Abstract: A method and apparatus generates thermal partitions for metal interconnects of an integrated circuit, based on interconnect self heat data and mutual heat data. Each of the thermal partitions includes data identifying thermally related interconnects and respective temperature values associated with each of the thermally related interconnects. Thermally related partitions that can be computed efficiently and simultaneously and the results then integrated using superposition for the full chips.