Patents by Inventor Rajiv Joshi

Rajiv Joshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10879923
    Abstract: Methods and systems to implement a multiply and accumulate (MAC) unit is described. In an example, a device can include a current mode digital-to-analog converter (DAC) configured to multiply an input signal with an input current to generate a signal. The device can further include a current divider coupled to the current mode DAC. The current divider can be configured to divide the signal into at least a first current having a first amplitude and a second current having a second amplitude. The device can further include a mixer configured to multiply the second current with a clock signal to generate a third current. The third signal can be combined with the first signal via a current summing node to generate an output signal. The output signal can be outputted to another device.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: December 29, 2020
    Assignee: International Business Machines Corporation
    Inventors: Sudipto Chakraborty, Rajiv Joshi
  • Patent number: 10833685
    Abstract: A voltage controlled oscillator (VCO) circuit and method achieves linearized frequency tuning over an extended range of analog tuning voltage by implementing a magnetic balun/transformer for biasing and coupling varactor elements. An active negative transconductance circuit of cross-coupled transistors have drains connected with a resonant tank circuit and at least a first varactor element having ends connected to respective first ends of respective first coils of a respective first and second magnetic balun. Respective second ends of respective first coils of respective first and second baluns are connected to a first reference supply voltage. A second varactor element has ends connecting respective first ends of respective second coils of said first and second baluns. A sinking of a bias current through the resonant tank circuit and the transconductance circuit generates an oscillating signal. A calibration method achieves precise VCO gain over wide tuning voltage range, thereby enhancing VCO linearity.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: November 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Sudipto Chakraborty, Rajiv Joshi, Steven J. Holmes, Bruce B. Doris
  • Publication number: 20200343614
    Abstract: A high input impedance magnetic balun/transformer having a phase balancing network (PBN) and method of operating. The balun is fully configurable and trimmable post fabrication using independently adjustable resistive and reactive parts by changing the resistance of a programmed transistor, e.g., NMOS. Parallel connected legs each having a field effect transistors (FETs) that make up NMOS device alter the impedance at the balun output terminals. The ground terminal of a secondary winding or coil at an unbalanced, single-ended side is connected to a phase balancing network. The phase balancing network includes at least two parallel legs, each leg having a resistive element in the form of a transistor device and at least one leg including a capacitive element. The transistor device at a leg can be operated in a linear region to trim the resistance and capacitances at the unbalanced side in order to achieve proper phase balancing and amplitude matching.
    Type: Application
    Filed: April 25, 2019
    Publication date: October 29, 2020
    Inventors: Sudipto Chakraborty, Rajiv Joshi, Steven J. Holmes, Bruce B. Doris
  • Publication number: 20200168290
    Abstract: A first voltage may be applied to a memory in a neural network. The memory may include one or more memory cells. A processor may determine that a first memory cell in the memory is faulty at the first voltage. The first voltage may be a low voltage. The processor may identify a first factor in the neural network. The first factor may have a low criticality in the neural network. The processor may determine to store the first factor in the first memory cell. The processor may store the first factor in the first memory cell.
    Type: Application
    Filed: January 28, 2020
    Publication date: May 28, 2020
    Inventors: Alper Buyuktosunoglu, Swagath Venkataramani, Rajiv Joshi, Karthik V. Swaminathan, Schuyler Eldridge, Pradip Bose
  • Patent number: 10607715
    Abstract: A first voltage may be applied to a memory in a neural network. The memory may include one or more memory cells. A processor may determine that a first memory cell in the memory is faulty at the first voltage. The first voltage may be a low voltage. The processor may identify a first factor in the neural network. The first factor may have a low criticality in the neural network. The processor may determine to store the first factor in the first memory cell. The processor may store the first factor in the first memory cell.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: March 31, 2020
    Assignee: International Business Machines Corporation
    Inventors: Alper Buyuktosunoglu, Swagath Venkataramani, Rajiv Joshi, Karthik V. Swaminathan, Schuyler Eldridge, Pradip Bose
  • Patent number: 10342851
    Abstract: The invention relates to the use of an Engrailed protein as a medicament for increasing dopamine synthesis by dopaminergic neurons, in particular in the management of conditions associated with a decrease of dopamine levels without loss of dopaminergic neurons.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: July 9, 2019
    Assignees: Centre National de la Recherche Scientifique, College de France
    Inventors: Alain Prochiantz, Kenneth Moya, Rajiv Joshi
  • Publication number: 20190205950
    Abstract: Method and apparatus for generating profiles using machine learning and influencing online interactions are provided. The methods include receiving, from a first user of a plurality of users, a first set of electronic documents, where each electronic document in the first set of electronic documents corresponds to a respective user in the plurality of users. The methods also include identifying a plurality of user profiles, where each of the plurality of user profiles was generated by processing a corpus of electronic documents associated with each respective user using a first trained machine learning model. The methods include determining a plurality of match coefficients, based on comparing a plurality of user profiles associated with each respective user in the plurality of users, filtering the first set of electronic documents based on the plurality of match coefficients, and providing the filtered first set of electronic documents to the first user.
    Type: Application
    Filed: December 28, 2017
    Publication date: July 4, 2019
    Inventors: Swaminathan BALASUBRAMANIAN, Avijit CHATTERJEE, Rajiv JOSHI, John J. THOMAS
  • Publication number: 20190205793
    Abstract: Method and apparatus for generating profiles using machine learning and influencing online interactions are provided. The methods include generating a user profile specifying a plurality of attribute values for a plurality of principle attributes, by processing a corpus of electronic documents using a first trained machine learning model. In an embodiment, the method further comprises generating a provider profile specifying a plurality of attribute values for the plurality of principle attributes, for each of a plurality of providers, by processing a respective corpus of electronic documents associated with each respective provider using a second trained machine learning model. A plurality of match coefficients based on comparing the user profile and the plurality of provider profiles are determined. Finally, one or more online interactions between the user and the target provider are influenced based on the determined match coefficients.
    Type: Application
    Filed: December 28, 2017
    Publication date: July 4, 2019
    Inventors: Swaminathan BALASUBRAMANIAN, Avijit CHATTERJEE, Rajiv JOSHI, John J. THOMAS
  • Publication number: 20180358110
    Abstract: A first voltage may be applied to a memory in a neural network. The memory may include one or more memory cells. A processor may determine that a first memory cell in the memory is faulty at the first voltage. The first voltage may be a low voltage. The processor may identify a first factor in the neural network. The first factor may have a low criticality in the neural network. The processor may determine to store the first factor in the first memory cell. The processor may store the first factor in the first memory cell.
    Type: Application
    Filed: June 13, 2017
    Publication date: December 13, 2018
    Inventors: Alper Buyuktosunoglu, Swagath Venkataramani, Rajiv Joshi, Karthik V. Swaminathan, Schuyler Eldridge, Pradip Bose
  • Patent number: 10100307
    Abstract: The invention relates to the use of a reverse-transcriptase inhibitor in the prevention or treatment of a degenerative disease.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: October 16, 2018
    Assignees: Centre National de la Recherche Scientifique, Institut National de la Sante et de la Recherche Medicale (INSERM), College de France, Sorbonne Universite
    Inventors: Alain Prochiantz, Julia Fuchs, Rajiv Joshi, François Xavier Blaudin De The, Hocine Rekaik, Olivia Massiani-Beaudoin
  • Publication number: 20180271937
    Abstract: The invention relates to the use of an Engrailed protein as a medicament for increasing dopamine synthesis by dopaminergic neurons, in particular in the management of conditions associated with a decrease of dopamine levels without loss of dopaminergic neurons.
    Type: Application
    Filed: March 16, 2018
    Publication date: September 27, 2018
    Applicants: Centre National de la Recherche Scientifique, College de France
    Inventors: Alain Prochiantz, Kenneth Moya, Rajiv Joshi
  • Patent number: 9950033
    Abstract: The invention relates to the use of an Engrailed protein as a medicament for increasing dopamine synthesis by dopaminergic neurons, in particular in the management of conditions associated with a decrease of dopamine levels without loss of dopaminergic neurons.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: April 24, 2018
    Assignees: Centre National de la Recherche Scientifique, College de France
    Inventors: Alain Prochiantz, Kenneth Moya, Rajiv Joshi
  • Publication number: 20170335320
    Abstract: The invention relates to the use of a reverse-transcriptase inhibitor in the prevention or treatment of a degenerative disease.
    Type: Application
    Filed: October 30, 2015
    Publication date: November 23, 2017
    Inventors: Alain Prochiantz, Julia Fuchs, Rajiv Joshi, François Xavier Blaudin De The, Hocine Rekaik, Olivia Massiani-Beaudoin
  • Publication number: 20150057231
    Abstract: The invention relates to the use of an Engrailed protein as a medicament for increasing dopamine synthesis by dopaminergic neurons, in particular in the management of conditions associated with a decrease of dopamine levels without loss of dopaminergic neurons
    Type: Application
    Filed: February 29, 2012
    Publication date: February 26, 2015
    Applicants: COLLEGE DE FRANCE, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventors: Alain Prochiantz, Kenneth Moya, Rajiv Joshi
  • Patent number: 8255359
    Abstract: Aspects of the advancement provide for information to be synchronized in an asynchronous manner among two or more computing devices.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: August 28, 2012
    Assignee: Visto Corporation
    Inventors: Sean M. Quinlan, Daniel J. Mendez, Rajiv Joshi, Yuri Ardulov
  • Patent number: 8069144
    Abstract: Aspects of the invention provide for information to be synchronized in an asynchronous manner among two or more computing devices.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: November 29, 2011
    Assignee: Visto Corporation
    Inventors: Sean Quinlan, Daniel J. Mendez, Rajiv Joshi, Yuri Ardulov
  • Publication number: 20100268844
    Abstract: Aspects of the invention provide for information to be synchronized in an asynchronous manner among two or more computing devices.
    Type: Application
    Filed: June 9, 2010
    Publication date: October 21, 2010
    Applicant: VISTO CORPORATION
    Inventors: Sean QUINLAN, Daniel J. Mendez, Rajiv Joshi, Yuri Ardulov
  • Patent number: 7752166
    Abstract: Aspects of the invention provide for information to be synchronized in an asynchronous manner among two or more computing devices.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: July 6, 2010
    Assignee: Visto Corporation
    Inventors: Sean Quinlan, Daniel J. Mendez, Rajiv Joshi, Yuri Ardulov
  • Publication number: 20100100641
    Abstract: Aspects of the advancement provide for information to be synchronized in an asynchronous manner among two or more computing devices.
    Type: Application
    Filed: December 23, 2009
    Publication date: April 22, 2010
    Applicant: VISTO CORPORATION
    Inventors: Sean M. QUINLAN, Daniel J. Mendez, Rajiv Joshi, Yuri Ardulov
  • Publication number: 20080105898
    Abstract: A channel 16 of a FinFET 10 has a channel core 24 and a channel envelope 32, each made from a semiconductor material defining a different lattice structure to exploit strained silicon properties. A gate is coupled to the channel envelope through a gate dielectric. Exemplary materials are Si and SiXGe1?x, wherein 78<x<92. The channel core 24 has a top surface 26 of width wc and an upstanding surface 28, 30 of height hc, preferably oriented 90° to one another. The channel envelope 32 is in contact with the top 26 and upstanding surfaces 28, 30 so that the area of interface is increased as compared to contact only along the top surface 26, improving electrical conductivity and gate 18 control over the channel 16. The height hc, can be tailored to enable a smaller scale FET 10 within a stabilized SRAM. Various methods of making the channel 16 are disclosed, including a mask and etch method, a handle wafer/carrier wafer method, and a shallow trench method.
    Type: Application
    Filed: January 7, 2008
    Publication date: May 8, 2008
    Inventors: Rajiv Joshi, Richard Williams