Patents by Inventor Rakesh R. Nair

Rakesh R. Nair has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Field effect transistor and method for production thereof
    Patent number: 10121981
    Abstract: A vertical channel field-effect transistor is taught. The vertical channel field-effect transistor comprises a primary substrate and a secondary substrate. A bottom conducting layer is provided on the primary substrate. A top conducting layer is transferred from a secondary substrate to the primary substrate by using an insulating adhesive layer. The thickness of the insulating adhesive layer defines the channel length. The portion of the top conducting layer which is over the bottom conducting layer defines the maximum possible channel. At least one semiconducting layer is provided on and around a perimeter of at least a portion of the channel width. At least one insulating layer is provided on at least a portion of the at least one semiconducting layer. At least one gate conducting layer provided on at least a portion of the at least one insulating layer.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: November 6, 2018
    Assignee: Saralon GmbH
    Inventors: Moazzam Ali, Rakesh R Nair
  • Field Effect Transistor and Method for Production Thereof
    Publication number: 20180026213
    Abstract: A vertical channel field-effect transistor is taught. The vertical channel field-effect transistor comprises a primary substrate and a secondary substrate. A bottom conducting layer is provided on the primary substrate. A top conducting layer is transferred from a secondary substrate to the primary substrate by using an insulating adhesive layer. The thickness of the insulating adhesive layer defines the channel length. The portion of the top conducting layer which is over the bottom conducting layer defines the maximum possible channel. At least one semiconducting layer is provided on and around a perimeter of at least a portion of the channel width. At least one insulating layer is provided on at least a portion of the at least one semiconducting layer. At least one gate conducting layer provided on at least a portion of the at least one insulating layer.
    Type: Application
    Filed: May 23, 2017
    Publication date: January 25, 2018
    Inventors: Moazzam Ali, Rakesh R. Nair