Patents by Inventor Rakhel Kumar Parida
Rakhel Kumar Parida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9858913Abstract: A system for noise removal is coupled to a signal unit that provides a digital signal. The noise removal system includes a transformation module to transform the digital signal into an f-digital signal, a threshold filter to generate a noiseless signal from the f-digital signal based on a threshold profile, and a signal synthesizer to provide a gain to the noiseless signal and to transform the noiseless signal into an output signal.Type: GrantFiled: May 15, 2017Date of Patent: January 2, 2018Assignee: STMICROELECTRONICS INTERNATIONAL N.V.Inventors: Ankur Bal, Anupam Jain, Rakhel Kumar Parida
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Publication number: 20170249931Abstract: A system for noise removal is coupled to a signal unit that provides a digital signal. The noise removal system includes a transformation module to transform the digital signal into an f-digital signal, a threshold filter to generate a noiseless signal from the f-digital signal based on a threshold profile, and a signal synthesizer to provide a gain to the noiseless signal and to transform the noiseless signal into an output signal.Type: ApplicationFiled: May 15, 2017Publication date: August 31, 2017Inventors: Ankur Bal, Anupam Jain, Rakhel Kumar Parida
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Patent number: 9685150Abstract: A system for noise removal is coupled to a signal unit that provides a digital signal. The noise removal system includes a transformation module to transform the digital signal into an f-digital signal, a threshold filter to generate a noiseless signal from the f-digital signal based on a threshold profile, and a signal synthesizer to provide a gain to the noiseless signal and to transform the noiseless signal into an output signal.Type: GrantFiled: May 6, 2014Date of Patent: June 20, 2017Assignee: STMICROELECTRONICS INTERNATIONAL N.V.Inventors: Ankur Bal, Anupam Jain, Rakhel Kumar Parida
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Patent number: 9608653Abstract: A device can be used for compensating bandwidth mismatches of time interleaved analog to digital converters. A processor of the device determines, for each original sample stream, an estimated difference between the time constant of a low pass filter representative of the corresponding converter and a reference time constant of a reference low pass filter, and uses this estimated difference and a filtered stream to correct the original stream and deliver a corrected stream of corrected samples.Type: GrantFiled: November 21, 2014Date of Patent: March 28, 2017Assignee: STMicroelectronics SAInventors: Nicolas Le Dortz, Thierry Simon, Pascal Urard, Caroline Lelandais-Perrault, Rakhel Kumar Parida
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Publication number: 20170026052Abstract: A device can be used for compensating bandwith mismatches of time interleaved analog to digital converters. A processor of the device determines, for each original sample stream, an estimated difference between the time constant of a low pass filter representative of the corresponding converter and a reference time constant of a reference low pass filter, and uses this estimated difference and a filtered stream to correct the original stream and deliver a corrected stream of corrected samples.Type: ApplicationFiled: November 21, 2014Publication date: January 26, 2017Inventors: Nicolas Le Dortz, Thierry Simon, Pascal Urard, Caroline Lelandais-Perrault, Rakhel Kumar Parida
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Publication number: 20140241539Abstract: A system for noise removal is coupled to a signal unit that provides a digital signal. The noise removal system includes a transformation module to transform the digital signal into an f-digital signal, a threshold filter to generate a noiseless signal from the f-digital signal based on a threshold profile, and a signal synthesizer to provide a gain to the noiseless signal and to transform the noiseless signal into an output signal.Type: ApplicationFiled: May 6, 2014Publication date: August 28, 2014Applicant: STMicroelectronics International N.V.Inventors: Ankur BAL, Anupam JAIN, Rakhel Kumar PARIDA
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Patent number: 8803718Abstract: A dynamic element matching (DEM) scheme is implemented in a crawling code generator for converting a b-bit binary input code into a (2b?1)-bit digital output code. A random generator determines for every conversion step a direction. A decimal difference between the current and previous binary input is calculated. The new crawling output code is determined based on the previous crawling output code, the direction and the decimal difference. The DEM scheme is used in a digital-to-analog converter such that the crawling output code switches digital-to-analog converting elements that output analog signals that are then summed to be the final analog signal.Type: GrantFiled: March 16, 2012Date of Patent: August 12, 2014Assignee: STMicroelectronics International N.V.Inventors: Rakhel Kumar Parida, Ankur Bal, Anil Kumar, Anupam Jain
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Patent number: 8738679Abstract: An offset free sinc interpolating filter includes differentiators operating at a first sampling frequency, integrators operating at a second sampling frequency and one or more coefficient multipliers. The coefficient multipliers multiply a received value with a constant coefficient value to generate an output value. The differentiators, integrators and coefficient multipliers can be operatively coupled to each other, either directly or through other components such as adders and delay elements, or by a combination of the two. In operation, an input signal is provided to the sinc interpolating filter at the first sampling frequency. The input signal is processed by the differentiators, integrators and coefficient multipliers to generate an output signal at the second sampling frequency. Once the output signal is generated, the integrators are reset before the next input cycle begins.Type: GrantFiled: September 23, 2009Date of Patent: May 27, 2014Assignee: STMicroelectronics International N.V.Inventors: Rakhel Kumar Parida, Ankur Bal, Anupam Jain
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Patent number: 8731214Abstract: A system for noise removal is coupled to a signal unit that provides a digital signal. The noise removal system includes a transformation module to transform the digital signal into an f-digital signal, a threshold filter to generate a noiseless signal from the f-digital signal based on a threshold profile, and a signal synthesizer to provide a gain to the noiseless signal and to transform the noiseless signal into an output signal.Type: GrantFiled: April 23, 2010Date of Patent: May 20, 2014Assignee: STMicroelectronics International N.V.Inventors: Ankur Bal, Anupam Jain, Rakhel Kumar Parida
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Publication number: 20120176264Abstract: A dynamic element matching (DEM) scheme is implemented in a crawling code generator for converting a b-bit binary input code into a (2b?1)-bit digital output code. A random generator determines for every conversion step a direction. A decimal difference between the current and previous binary input is calculated. The new crawling output code is determined based on the previous crawling output code, the direction and the decimal difference. The DEM scheme is used in a digital-to-analog converter such that the crawling output code switches digital-to-analog converting elements that output analog signals that are then summed to be the final analog signal.Type: ApplicationFiled: March 16, 2012Publication date: July 12, 2012Applicant: STMicroelectronics PVT LTD (INDIA)Inventors: Rakhel Kumar PARIDA, Ankur BAL, Anil KUMAR, Anupam JAIN
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Patent number: 8159381Abstract: A dynamic element matching (DEM) scheme is implemented in a crawling code generator for converting a b-bit binary input code into a (2b?1)-bit digital output code. A random generator determines for every conversion step a direction. A decimal difference between the current and previous binary input is calculated. The new crawling output code is determined based on the previous crawling output code, the direction and the decimal difference. The DEM scheme is used in a digital-to-analog converter such that the crawling output code switches digital-to-analog converting elements that output analog signals that are then summed to be the final analog signal.Type: GrantFiled: July 23, 2010Date of Patent: April 17, 2012Assignee: STMicroelectronics Pvt. Ltd.Inventors: Rakhel Kumar Parida, Ankur Bal, Anil Kumar, Anupam Jain
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Publication number: 20110279292Abstract: A dynamic element matching (DEM) scheme is implemented in a crawling code generator for converting a b-bit binary input code into a (2b?1)-bit digital output code. A random generator determines for every conversion step a direction. A decimal difference between the current and previous binary input is calculated. The new crawling output code is determined based on the previous crawling output code, the direction and the decimal difference. The DEM scheme is used in a digital-to-analog converter such that the crawling output code switches digital-to-analog converting elements that output analog signals that are then summed to be the final analog signal.Type: ApplicationFiled: July 23, 2010Publication date: November 17, 2011Applicant: STMICROELECTRONICS PVT. LTD.Inventors: Rakhel Kumar Parida, Ankur Bal, Anil Kumar, Anupam Jain
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Publication number: 20110142254Abstract: A system for noise removal is coupled to a signal unit that provides a digital signal. The noise removal system includes a transformation module to transform the digital signal into an f-digital signal, a threshold filter to generate a noiseless signal from the f-digital signal based on a threshold profile, and a signal synthesizer to provide a gain to the noiseless signal and to transform the noiseless signal into an output signal.Type: ApplicationFiled: April 23, 2010Publication date: June 16, 2011Applicant: STMICROELECTRONICS PVT., LTD.Inventors: Ankur BAL, Anupam Jain, Rakhel Kumar Parida
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Publication number: 20110004647Abstract: An offset free sinc interpolating filter includes differentiators operating at a first sampling frequency, integrators operating at a second sampling frequency and one or more coefficient multipliers. The coefficient multipliers multiply a received value with a constant coefficient value to generate an output value. The differentiators, integrators and coefficient multipliers can be operatively coupled to each other, either directly or through other components such as adders and delay elements, or by a combination of the two. In operation, an input signal is provided to the sinc interpolating filter at the first sampling frequency. The input signal is processed by the differentiators, integrators and coefficient multipliers to generate an output signal at the second sampling frequency. Once the output signal is generated, the integrators are reset before the next input cycle begins.Type: ApplicationFiled: September 23, 2009Publication date: January 6, 2011Applicant: STMicroelectronics Pvt. Ltd.Inventors: Rakhel Kumar PARIDA, Ankur BAL, Anupam Jain