Abstract: A programmable linear receiver which provides the requisite level of system performance at reduced power consumption. The receiver minimizes power consumption based on measurement of the non-linearity in the output signal from the receiver. The amount of non-linearity can be measured by the RSSI slope or energy-per-chip-to-noise-ratio (Ec/Io) measurement. The RSSI slope is the ratio of the change in the output signal plus intermodulation to the change in the input signal. The input signal level is periodically increased by a predetermined level and the output signal from the receiver is measured. The output signal comprises the desired signal and intermodulation products from non-linearity within the receiver. When the receiver is operating linearly, the output signal level increases dB per dB with the input signal level. However, as the receiver transitions into non-linear region, intermodulation products due to non-linearity increase faster than the desired signal.

Abstract: A quadrature modulator and demodulator which provide the requisite level of performance while minimizing power consumption. In the quadrature modulator, the I and Q signals are provided to two pairs of mixers. Each mixer in a pair of mixers modulates an I or Q signal with the respective inphase or quadrature IF sinusoid. The I and Q modulated signals from each pair of mixers are summed. The signals from the summers are provided to a third pair of mixer and modulated with the respective inphase and quadrature RF sinusoids. The signals from the third pair of mixers are summed and provided as the modulated signal. Using this quadrature modulator topology, the amplitude balance and phase error of the modulated signal are made insensitive to the amplitude imbalance and/or phase error of the quadrature splitters used to generate the IF and RF sinusoids. Furthermore, since the first two pairs of mixers and the two subsequent summers are operated at IF frequency, the performance requirements (e.g.

Abstract: A power amplifier circuit arrangement including a driver amplifier, a switch, an amplifier path having a band pass filter and a power amplifier, and a bypass path which bypasses the power amplifier when excess gain and output power are not needed. When an RF-analog signal from the driver amplifier is switched to the amplifier path, the signal is band-pass filtered and amplified. Then the signal is split into an in-phase and a quadrature signal. Either the in-phase or the quadrature signal is inverted and summed with the other of the in-phase or quadrature signal, and the summed signal is transmitted to an output port. When the RF-signal from the driver amplified is switched to the bypass path, the power amplifier is turned off and the bypass path directs the signal to the output of the power amplifier, which appears as a high impedance to the signal. The signal reflects off the power amplifier to the output port.

Abstract: An amplifier having an adjustable current source which can be controlled to provide the requisite level of performance at reduced current consumption. The amplifier is first designed using one of many designs available and known in the art. A current source is then designed to provide adjustable bias current for the amplifier. The current source can be designed with MOSFETs which require no additional bias current and can accept a standard digital control signal. The current source can also be designed with active devices which are selected based on the logic of the control signals for ease of interface. The bias current determines the linearity and noise performance of the amplifier. The bias current is adjusted to provide the requisite level of performance while reducing power consumption. The current source can be designed to operate in discrete steps or to have substantially continuous current steps.