Patents by Inventor Ralph M. Lombardo, Jr.
Ralph M. Lombardo, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5134706Abstract: A bus interface interrupt arrangement is disclosed which provides separate interrupt controllers for each bus in a multibus computer system where the processor is connected to one of the busses. Interrupt requests decided on each of the busses other than a primary bus to which the processor is connected are input along with interrupts from circuits connected to the primary bus to the interrupt controller for the primary bus. The interrupt request decided by the interrupt controller for the primary bus is connected to an interrupt input of the processor. All interrupt controllers are connected to the primary bus and may be accessed by the processor. When an interrupt from one of the busses other than the primary bus is chosen by the processor, the processor must read the interrupt controllers to determine first what bus, and then identify the circuit that generated the interrupt that has been acknowledged.Type: GrantFiled: April 19, 1990Date of Patent: July 28, 1992Assignee: Bull HN Information Systems Inc.Inventors: David E. Cushing, Ralph M. Lombardo, Jr., Forrest M. Phillips
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Patent number: 4521848Abstract: An error detection system is disclosed for not only indicating but eliminating certain errors which may occur during the transfer of information between communication busses in a data processing system wherein plural communication busses each provide a common information path to plural data processing units including memory units, peripheral control units, central processing units and ISL units, and wherein each of the plural communication busses are in electrical communication with an ISL unit, and ISL units are electrically connected in pairs. The error detection system requires no special supporting software or firmware on the part of any data processing unit on any of the communication busses.Type: GrantFiled: August 27, 1981Date of Patent: June 4, 1985Assignee: Honeywell Information Systems Inc.Inventors: Kenneth E. Bruce, Ralph M. Lombardo, Jr., Bruce H. Tarbox, John W. Conway
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Patent number: 4433376Abstract: A logic system is provided for accommodating the exchange of information between two or more communication busses of a data processing system, wherein plural central processing units and plural memory units on independent communication busses may have same logic addresses. Memory and CPU addresses are translated at the bus rate through a multiplicity of flexible address translation ranges to enable a data processing unit on one communication bus to access an apparent contiguous range of addresses encompassing all data processing units on all communication busses.Type: GrantFiled: December 15, 1980Date of Patent: February 21, 1984Assignee: Honeywell Information Systems Inc.Inventors: Ralph M. Lombardo, Jr., John J. Bradley, Kenneth E. Bruce, John W. Conway, David B. O'Keefe, Bruce H. Tarbox
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Patent number: 4384322Abstract: An intersystem communication control system in an intersystem link (ISL) unit is provided to accommodate the simultaneous bidirectional transfer of binary coded information between communication busses in a data processing system, wherein the plural communication busses are electrically interconnected by ISL unit twins, and information may be transferred between plural communication busses asynchronously.Type: GrantFiled: January 7, 1980Date of Patent: May 17, 1983Assignee: Honeywell Information Systems Inc.Inventors: Kenneth E. Bruce, Ralph M. Lombardo, Jr., Bruce H. Tarbox, John W. Conway
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Patent number: 4384327Abstract: A logic control system in an intersystem link (ISL) unit accommodating the transfer of binary coded information between communication busses in a data processing system is disclosed, wherein information may be transferred between plural communication busses while further information flow continues on each communication bus at the bus rate, and additional information transfers between the communication busses continue to be handled by the ISL unit.Type: GrantFiled: January 8, 1981Date of Patent: May 17, 1983Assignee: Honeywell Information Systems Inc.Inventors: John W. Conway, John J. Bradley, Kenneth E. Bruce, Ralph M. Lombardo, Jr., Bruce H. Tarbox
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Patent number: 4370708Abstract: A logic control system in an intersystem link (ISL) unit accommodating the transfer of binary coded information between communication busses in a data processing system is disclosed, wherein an ISL unit may be reconfigured to reallocate communication bus resources without incurring excessive software overhead time losses.Type: GrantFiled: January 7, 1980Date of Patent: January 25, 1983Assignee: Honeywell Information Systems Inc.Inventors: Kenneth E. Bruce, John W. Conway, Ralph M. Lombardo, Jr., Bruce H. Tarbox
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Patent number: 4236208Abstract: A logic control system is disclosed for verifying the operability of memory and non-memory data and control paths in both local and remote intersystem link (ISL) units electrically interconnecting a local and remote communication bus in a data processing system. The data processing system may include two or more communication busses each pair of which are electrically interconnected by twin ISL units. The control logic architecture accommodates the receipt of a test mode command from a CPU on a local bus to initiate a test mode operation wherein the memory and non-memory data and control paths of both the local and the remote ISL units are excerised while on-line, and binary coded information received from the local bus is passed through the ISL units, onto the remote bus, and returned to a local bus memory resource for verification. No remote bus resources are used or affected, and the remote ISL unit shall ignore any communications received from any other data processing unit on the remote bus.Type: GrantFiled: October 31, 1978Date of Patent: November 25, 1980Assignee: Honeywell Information Systems Inc.Inventors: David B. O'Keefe, Kenneth E. Bruce, Ralph M. Lombardo, Jr., Bruce H. Tarbox, John W. Conway
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Patent number: 4236209Abstract: A logic system in an intersystem link (ISL) unit accommodating the transfer of binary coded information between communication busses in a data processing system is disclosed, wherein dedicated locations in a file register are selected at the bus rate in response to binary coded information received from a local communication bus. ISL transactions to be initiated in response to bus cycle requests thereby are identified. ISL transactions are handled in parallel, and memory transfers are segregated from non-memory transfers to avoid unnecessary delays in memory transfers.Type: GrantFiled: October 31, 1978Date of Patent: November 25, 1980Assignee: Honeywell Information Systems Inc.Inventors: Ralph M. Lombardo, Jr., George J. Barlow, John J. Bradley, Kenneth E. Bruce, John W. Conway, Bruce H. Tarbox
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Patent number: 4234919Abstract: A logic system referred to as an intersystem link unit (ISL) is provided for accommodating the transfer of binary coded information between two or more communication busses in a data processing system, wherein information including memory and non-memory read and write requests, CPU to CPU interrupts, peripheral control units to CPU interrupts may be transferred between plural communication busses each supporting plural data processing units including plural CPUs without substantially affecting the bus rate of the individual communication busses. Binary coded information from a communication bus is acquired asynchronously, and plural bus communications of different types are accommodated in parallel. The ISL units further may be dynamically reconfigured to provide for a reallocation of communication bus resources between communication busses.Type: GrantFiled: October 31, 1978Date of Patent: November 18, 1980Assignee: Honeywell Information Systems Inc.Inventors: Kenneth E. Bruce, George J. Barlow, John W. Conway, Ralph M. Lombardo, Jr., John J. Bradley, David B. O'Keefe
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Patent number: 4231086Abstract: A logic system in an intersystem link (ISL) unit is provided for avoiding deadlock conditions which may occur in a data processing system wherein multiple CPUs on one communication bus attempt to communicate with resources on remote communication busses.The data processing system has plural communication busses, each providing a common information path to plural data processing units including memory units, peripheral control units, central processing units (CPUs) and ISL units, and each of the plural communication busses are in electrical communication with an ISL unit, and ISL units are electrically connected in pairs.Type: GrantFiled: October 31, 1978Date of Patent: October 28, 1980Assignee: Honeywell Information Systems, Inc.Inventors: Bruce H. Tarbox, Kenneth E. Bruce, John W. Conway, Ralph M. Lombardo, Jr.