Patents by Inventor Ram Kishore Johri

Ram Kishore Johri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9710514
    Abstract: Systems and methods are provided for using metadata to efficiently access object data from two or more storage components. Control circuitry receives a request from a host device to perform an operation on a uniquely identified object in a storage system comprising at least a first storage component and a second storage component. Control circuitry retrieves metadata information about the location of the object in store, wherein the metadata information comprises a first indication of a location of the object in the first storage component and a second indication of a location of the object in the second storage component. The objects in one or both of the first and second storage components are located based on the retrieved metadata information, and the requested operation is performed on the requested object.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: July 18, 2017
    Assignee: Marvell International Ltd.
    Inventors: Abhijeet P. Gole, Ram Kishore Johri
  • Patent number: 9645920
    Abstract: A system comprises a partitioning module and a writing module. The partitioning module is configured to partition each of a plurality of solid-state disks into a plurality of blocks. Each of the plurality of blocks has a predetermined size. The writing module is configured to write data to one or more of the plurality of solid-state disks in a sequence starting from a first block of a first solid-state disk of the plurality of solid-state disks to a first block of a last solid-state disk of the plurality of solid-state disks, and subsequently starting from a second block of the first solid-state disk to a second block of the last solid-state disk. In each of each of the plurality of the plurality of solid-state disks, the second block is subsequent to the first block.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: May 9, 2017
    Assignee: Marvell World Trade LTD.
    Inventors: Abhijeet P. Gole, Ram Kishore Johri
  • Patent number: 9384155
    Abstract: The present disclosure includes systems and techniques relating to customization of a bus adapter card. in some implementations, an apparatus includes a processor and a program memory, a bus adapter card coupled with the computing apparatus and configured to connect with a storage device, the bus adapter card computing a cache memory and a controller to cache in the cache memory data associated with the storage device, where the program memory includes a driver to communicate with the bus adapter card responsive to requests corresponding to the storage device, and the driver is configured to modify its communications with the bus adapter card responsive to information provided separate from the requests.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: July 5, 2016
    Assignee: Toshiba Corporation
    Inventors: Arvind Pruthi, Ram Kishore Johri
  • Patent number: 9003159
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, can perform data caching. In some implementations, a method and system include receiving information that includes a logical address, allocating a physical page in a non-volatile memory structure, mapping the logical address to a physical address of the physical page, and writing, based on the physical address, data to the non-volatile memory structure to cache information associated with the logical address. The logical address can include an identifier of a data storage device and a logical page number.
    Type: Grant
    Filed: October 5, 2010
    Date of Patent: April 7, 2015
    Assignee: Marvell World Trade Ltd.
    Inventors: Shekhar S. Deshkar, Sandeep Karmarkar, Arvind Pruthi, Ram Kishore Johri
  • Publication number: 20140379965
    Abstract: A system comprises a partitioning module and a writing module. The partitioning module is configured to partition each of a plurality of solid-state disks into a plurality of blocks. Each of the plurality of blocks has a predetermined size. The writing module is configured to write data to one or more of the plurality of solid-state disks in a sequence starting from a first block of a first solid-state disk of the plurality of solid-state disks to a first block of a last solid-state disk of the plurality of solid-state disks, and subsequently starting from a second block of the first solid-state disk to a second block of the last solid-state disk. In each of each of the plurality of the plurality of solid-state disks, the second block is subsequent to the first block.
    Type: Application
    Filed: June 24, 2014
    Publication date: December 25, 2014
    Inventors: Abhijeet P. Gole, Ram Kishore Johri
  • Publication number: 20140129754
    Abstract: The present disclosure includes systems and techniques relating to customization of a bus adapter card. in some implementations, an apparatus includes a processor and a program memory, a bus adapter card coupled with the computing apparatus and configured to connect with a storage device, the bus adapter card computing a cache memory and a controller to cache in the cache memory data associated with the storage device, where the program memory includes a driver to communicate with the bus adapter card responsive to requests corresponding to the storage device, and the driver is configured to modify its communications with the bus adapter card responsive to information provided separate from the requests.
    Type: Application
    Filed: January 10, 2014
    Publication date: May 8, 2014
    Applicant: Marvell World Trade Ltd.
    Inventors: Arvind Pruthi, Ram Kishore Johri
  • Patent number: 8639868
    Abstract: The present disclosure includes systems and techniques relating to customization of a bus adapter card. In some implementations, an apparatus includes a processor and a program memory, a bus adapter card coupled with the computing apparatus and configured to connect with a storage device, the bus adapter card comprising a cache memory and a controller to cache in the cache memory data associated with the storage device, where the program memory includes a driver to communicate with the bus adapter card responsive to requests corresponding to the storage device, and the driver is configured to modify its communications with the bus adapter card responsive to information provided separate from the requests.
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: January 28, 2014
    Assignee: Marvell World Trade Ltd.
    Inventors: Arvind Pruthi, Ram Kishore Johri
  • Publication number: 20120102137
    Abstract: Systems, methods, and other embodiments associated with a cluster cache coherency protocol are described. According to one embodiment, an apparatus includes non-transitory storage media configured as a cache associated with a computing machine. The computing machine is a member of a cluster of computing machines that share access to a storage device. A cluster caching logic is associated with the computing machine. The cluster caching logic is configured to communicate with cluster caching logics associated with the other computing machines to determine an operational status of a clique of cluster caching logics performing caching operations on data in the storage device. The cluster caching logic is also configured to selectively enable caching of data from the storage device in the cache based, at least in part, on a membership status of the cluster caching logic in the clique.
    Type: Application
    Filed: October 21, 2011
    Publication date: April 26, 2012
    Inventors: Arvind PRUTHI, Ram Kishore JOHRI, Abhijeet P. GOLE
  • Publication number: 20120017020
    Abstract: The present disclosure includes systems and techniques relating to customization of a bus adapter card. In some implementations, an apparatus includes a processor and a program memory, a bus adapter card coupled with the computing apparatus and configured to connect with a storage device, the bus adapter card comprising a cache memory and a controller to cache in the cache memory data associated with the storage device, where the program memory includes a driver to communicate with the bus adapter card responsive to requests corresponding to the storage device, and the driver is configured to modify its communications with the bus adapter card responsive to information provided separate from the requests.
    Type: Application
    Filed: July 12, 2011
    Publication date: January 19, 2012
    Inventors: Arvind Pruthi, Ram Kishore Johri
  • Publication number: 20110082967
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, can perform data caching. In some implementations, a method and system include receiving information that includes a logical address, allocating a physical page in a non-volatile memory structure, mapping the logical address to a physical address of the physical page, and writing, based on the physical address, data to the non-volatile memory structure to cache information associated with the logical address. The logical address can include an identifier of a data storage device and a logical page number.
    Type: Application
    Filed: October 5, 2010
    Publication date: April 7, 2011
    Inventors: Shekhar S. Deshkar, Sandeep Karmarkar, Arvind Pruthi, Ram Kishore Johri
  • Publication number: 20100185806
    Abstract: A system includes a control module, a location description module, and a page invalidation module. The control module is configured to write data received from a host to a storage medium, read data from the storage medium, and cache data from at least one of the host and the storage medium in a flash memory. The location description module is configured to map one of a valid and invalid state to a physical location of a subset of data in the flash memory. The page invalidation module is configured to receive a command from one of the host and the control module that includes an address corresponding to the subset and an instruction to set a state of the physical location to the invalid state. The page invalidation module is further configured to set the state of the physical location to the invalid state in response to the command.
    Type: Application
    Filed: January 12, 2010
    Publication date: July 22, 2010
    Inventors: Arvind Pruthi, Ram Kishore Johri