Patents by Inventor Ram Kishore Johri
Ram Kishore Johri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9710514Abstract: Systems and methods are provided for using metadata to efficiently access object data from two or more storage components. Control circuitry receives a request from a host device to perform an operation on a uniquely identified object in a storage system comprising at least a first storage component and a second storage component. Control circuitry retrieves metadata information about the location of the object in store, wherein the metadata information comprises a first indication of a location of the object in the first storage component and a second indication of a location of the object in the second storage component. The objects in one or both of the first and second storage components are located based on the retrieved metadata information, and the requested operation is performed on the requested object.Type: GrantFiled: June 25, 2014Date of Patent: July 18, 2017Assignee: Marvell International Ltd.Inventors: Abhijeet P. Gole, Ram Kishore Johri
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Patent number: 9645920Abstract: A system comprises a partitioning module and a writing module. The partitioning module is configured to partition each of a plurality of solid-state disks into a plurality of blocks. Each of the plurality of blocks has a predetermined size. The writing module is configured to write data to one or more of the plurality of solid-state disks in a sequence starting from a first block of a first solid-state disk of the plurality of solid-state disks to a first block of a last solid-state disk of the plurality of solid-state disks, and subsequently starting from a second block of the first solid-state disk to a second block of the last solid-state disk. In each of each of the plurality of the plurality of solid-state disks, the second block is subsequent to the first block.Type: GrantFiled: June 24, 2014Date of Patent: May 9, 2017Assignee: Marvell World Trade LTD.Inventors: Abhijeet P. Gole, Ram Kishore Johri
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Patent number: 9384155Abstract: The present disclosure includes systems and techniques relating to customization of a bus adapter card. in some implementations, an apparatus includes a processor and a program memory, a bus adapter card coupled with the computing apparatus and configured to connect with a storage device, the bus adapter card computing a cache memory and a controller to cache in the cache memory data associated with the storage device, where the program memory includes a driver to communicate with the bus adapter card responsive to requests corresponding to the storage device, and the driver is configured to modify its communications with the bus adapter card responsive to information provided separate from the requests.Type: GrantFiled: January 10, 2014Date of Patent: July 5, 2016Assignee: Toshiba CorporationInventors: Arvind Pruthi, Ram Kishore Johri
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Patent number: 9003159Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, can perform data caching. In some implementations, a method and system include receiving information that includes a logical address, allocating a physical page in a non-volatile memory structure, mapping the logical address to a physical address of the physical page, and writing, based on the physical address, data to the non-volatile memory structure to cache information associated with the logical address. The logical address can include an identifier of a data storage device and a logical page number.Type: GrantFiled: October 5, 2010Date of Patent: April 7, 2015Assignee: Marvell World Trade Ltd.Inventors: Shekhar S. Deshkar, Sandeep Karmarkar, Arvind Pruthi, Ram Kishore Johri
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Publication number: 20140379965Abstract: A system comprises a partitioning module and a writing module. The partitioning module is configured to partition each of a plurality of solid-state disks into a plurality of blocks. Each of the plurality of blocks has a predetermined size. The writing module is configured to write data to one or more of the plurality of solid-state disks in a sequence starting from a first block of a first solid-state disk of the plurality of solid-state disks to a first block of a last solid-state disk of the plurality of solid-state disks, and subsequently starting from a second block of the first solid-state disk to a second block of the last solid-state disk. In each of each of the plurality of the plurality of solid-state disks, the second block is subsequent to the first block.Type: ApplicationFiled: June 24, 2014Publication date: December 25, 2014Inventors: Abhijeet P. Gole, Ram Kishore Johri
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Publication number: 20140129754Abstract: The present disclosure includes systems and techniques relating to customization of a bus adapter card. in some implementations, an apparatus includes a processor and a program memory, a bus adapter card coupled with the computing apparatus and configured to connect with a storage device, the bus adapter card computing a cache memory and a controller to cache in the cache memory data associated with the storage device, where the program memory includes a driver to communicate with the bus adapter card responsive to requests corresponding to the storage device, and the driver is configured to modify its communications with the bus adapter card responsive to information provided separate from the requests.Type: ApplicationFiled: January 10, 2014Publication date: May 8, 2014Applicant: Marvell World Trade Ltd.Inventors: Arvind Pruthi, Ram Kishore Johri
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Patent number: 8639868Abstract: The present disclosure includes systems and techniques relating to customization of a bus adapter card. In some implementations, an apparatus includes a processor and a program memory, a bus adapter card coupled with the computing apparatus and configured to connect with a storage device, the bus adapter card comprising a cache memory and a controller to cache in the cache memory data associated with the storage device, where the program memory includes a driver to communicate with the bus adapter card responsive to requests corresponding to the storage device, and the driver is configured to modify its communications with the bus adapter card responsive to information provided separate from the requests.Type: GrantFiled: July 12, 2011Date of Patent: January 28, 2014Assignee: Marvell World Trade Ltd.Inventors: Arvind Pruthi, Ram Kishore Johri
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Publication number: 20120102137Abstract: Systems, methods, and other embodiments associated with a cluster cache coherency protocol are described. According to one embodiment, an apparatus includes non-transitory storage media configured as a cache associated with a computing machine. The computing machine is a member of a cluster of computing machines that share access to a storage device. A cluster caching logic is associated with the computing machine. The cluster caching logic is configured to communicate with cluster caching logics associated with the other computing machines to determine an operational status of a clique of cluster caching logics performing caching operations on data in the storage device. The cluster caching logic is also configured to selectively enable caching of data from the storage device in the cache based, at least in part, on a membership status of the cluster caching logic in the clique.Type: ApplicationFiled: October 21, 2011Publication date: April 26, 2012Inventors: Arvind PRUTHI, Ram Kishore JOHRI, Abhijeet P. GOLE
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Publication number: 20120017020Abstract: The present disclosure includes systems and techniques relating to customization of a bus adapter card. In some implementations, an apparatus includes a processor and a program memory, a bus adapter card coupled with the computing apparatus and configured to connect with a storage device, the bus adapter card comprising a cache memory and a controller to cache in the cache memory data associated with the storage device, where the program memory includes a driver to communicate with the bus adapter card responsive to requests corresponding to the storage device, and the driver is configured to modify its communications with the bus adapter card responsive to information provided separate from the requests.Type: ApplicationFiled: July 12, 2011Publication date: January 19, 2012Inventors: Arvind Pruthi, Ram Kishore Johri
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Publication number: 20110082967Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, can perform data caching. In some implementations, a method and system include receiving information that includes a logical address, allocating a physical page in a non-volatile memory structure, mapping the logical address to a physical address of the physical page, and writing, based on the physical address, data to the non-volatile memory structure to cache information associated with the logical address. The logical address can include an identifier of a data storage device and a logical page number.Type: ApplicationFiled: October 5, 2010Publication date: April 7, 2011Inventors: Shekhar S. Deshkar, Sandeep Karmarkar, Arvind Pruthi, Ram Kishore Johri
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Publication number: 20100185806Abstract: A system includes a control module, a location description module, and a page invalidation module. The control module is configured to write data received from a host to a storage medium, read data from the storage medium, and cache data from at least one of the host and the storage medium in a flash memory. The location description module is configured to map one of a valid and invalid state to a physical location of a subset of data in the flash memory. The page invalidation module is configured to receive a command from one of the host and the control module that includes an address corresponding to the subset and an instruction to set a state of the physical location to the invalid state. The page invalidation module is further configured to set the state of the physical location to the invalid state in response to the command.Type: ApplicationFiled: January 12, 2010Publication date: July 22, 2010Inventors: Arvind Pruthi, Ram Kishore Johri