Abstract: A MESFET with a relatively short channel and small source-to-gate and drain-to-gate spacing for minimal series resistance and maximum frequency response having no alignments or critical steps. In particular, a mask is used to define schottky metal as ohmic metal from the source/drain areas across a relatively undoped bare substrate to within a predetermined distance L of the schottky gate wherein the predetermined distance is a non-critical electrical short-circuit as to the surface of the bare substrate. Thus the source-to-gate and drain-to-gate distances are non-critical because the predetermined distance L can be as critically controlled as the single mask that defines it.

Abstract: A MOSFET structure having DMOS characteristics fabricated using all implantation only without the use of time-consuming diffusion. Particularly the critical length of the channel is controlled by beveling one edge of an oxide layer to a predetermined slope thereby allowing transferral of ions to the substrate through the beveled edge only to a predetermined depth thereof before being completely shielded. The result is a channel having a closely controlled length to thus be relatively very short for very fast switching of low or high voltage signals.

Abstract: Nibs formed as doped lines on a substrate operative to function as a writing head for a non-impact high voltage electrostatic printer. The doped lined styli may be defined with conventional integrated circuit photolithography for increased scratch protection and reduced wearout.

Abstract: Integrated monolithic arrays of high voltage metal oxide semiconductor field effect transistors having closed geometry grounded peripheries for inter-device isolation are able to function as drivers that may be switched on and off. The HVMOSFET includes DMOS-like structures with separate channel and drift regions, closed geometry configurations with center drains and split oxide topography having relatively thin oxide under a field plate and over a drift region for surface depletion and high voltage field inversion preclusion respectfully. The infra described HVMOSFET is able to route high voltage lines therein for operative connection to the high voltage terminals thereof while providing inter-device isolation from the fields generated by the HV lines.

Abstract: Integrated monlithic arrays of high voltage metal oxide semiconductor field effect Transistors having closed geometry grounded peripheries for interdevice isolation are able to function as drivers that may be switched on and off. The HVMOSFET'S includes DMOS-like structures with separate channel and drift regions, closed geometry configurations with center drains, and split oxide topography having relatively thin oxide under a control gate and over a channel region, and relatively thick oxide under a field plate and over a drift region for surface depletion and high voltage field inversion preclusion respectfully. The infra described HVMOSFET is able to prevent field crowding and adjust field lines to be perpendicular relative to the surface without the use of the field plates by the implementation of doped rings around the drain and along the surface of the substrate.

Abstract: Integrated monlithic arrays of high voltage metal oxide semiconductor field effect transistors having closed geometry grounded peripheries for interdevice isolation are able to function as drivers that may be switched on and off. The HVMOSFET'S includes DMOS-like structures with separate channel and drift regions, closed geometry configurations with center drains, and split oxide topography having relatively thin oxide under a control gate and over a channel regon, and relatively thick oxide under a field plate and over a drift region for surface depletion and high voltage field inversion preclusion respectfully. The infra described HVMOSFET includes multiple overlapping field plate and gate electrode able to overcome series resistance associated with HVMOSFET devices having large drift regions.

Abstract: Integrated monolithic arrays of high voltage metal oxide semiconductor field effect transistors having closed geometry grounded peripheries for interdevice isolation are able to function as drivers that may be switched on and off. The HVMOSFET'S include DMOS-like structures with separate channel and drift regions, closed geometry configurations with center drains, and split oxide topography having relatively thick oxide under a field plate and over a drift region for surface depletion and high voltage field inversion preclusion respectfully. The infra described HVMOSFET includes an active load operatively connected in cascade and connecting to a device switch for forming an integrated HV Active Switch in a monolithic array.

Abstract: Integrated monolithic arrays of high voltage metal oxide semiconductor field effect transistors having closed geometry grounded peripheries for inter-device isolation are able to function as drivers that may be switched on and off. The HVMOSFET'S includes DMOS-like structures with separate channel and drift regions, closed geometry configurations with center drains, and split oxide topography having relatively thin oxide under a control gate and over a channel region, and relatively thick oxide under a field plate and over a drift region for surface depletion and high voltage field inversion preclusion respectfully. The infra described HVMOSFET with single polysilicon layers for non-overlapping gates is operative to bend field lines away from the drain oven thereby increasing the available breakdown voltage adjacent to the drain area.

Abstract: Integrated monlithic arrays of high voltage metal oxide semiconductor field effect transistors having closed geometry grounded peripheries for interdevice isolation are able to function as drivers that may be switched on and off. The HVMOSFET included DMOS-like structures with separate channel and drift regions, closed geometry configurations with center drains, and split oxide topography having relatively thin oxide under a field plate and over a drift region for surface depletion and high voltage inversion preclusion respectfully. The infra described HVMOSFET includes doping the areas between the field plates, gates and drain electrodes for the purpose of minimizing the problem of series resistance inherent in HVMOSFET'S with spatial gaps between the surface electrodes.