Patents by Inventor Rama Bisa

Rama Bisa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SMART NETWORK INTERFACE CONTROLLER SERIAL COMMUNICATION REDIRECTION
    Publication number: 20230342324
    Abstract: An information handling system may include a management controller configured to provide out-of-band management of the information handling system. The information handling system may further include a network interface controller. The management controller may be configured to: receive management data from the network interface controller; and redirect the management data to a remote console.
    Type: Application
    Filed: April 25, 2022
    Publication date: October 26, 2023
    Applicant: Dell Products L.P.
    Inventors: Deepaganesh PAULRAJ, Akkiah Choudary MADDUKURI, Lee E. BALLARD, Elie Antoun JREIJ, Mahesh Babu RAMAIAH, Rajeshkumar Ichchhubhai PATEL, Rama BISA, Jitendra Kumar RATH, Brian Scott BERRY
  • System and method for providing secure console access with multiple smart NICs using NC-SL and SPDM
    Patent number: 11445028
    Abstract: An information handling system includes a data handling device and a baseboard management controller (BMC). The data handling device includes a co-processor configured to instantiate a device operating system for the data handling device. The data handling device includes a Management Component Transport Protocol (MCTP) endpoint. The BMC establishes a serial terminal session with the device operating system via the MCTP endpoint.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: September 13, 2022
    Assignee: Dell Products L.P.
    Inventors: Akkiah Maddukuri, Robert Stevens, Deepaganesh Paulraj, Elie Jreij, Rama Bisa
  • SYSTEM AND METHOD FOR PROVIDING SECURE CONSOLE ACCESS WITH MULTTIPLE SMART NICS USING NC-SI AND SPDM
    Publication number: 20220210229
    Abstract: An information handling system includes a data handling device and a baseboard management controller (BMC). The data handling device includes a co-processor configured to instantiate a device operating system for the data handling device. The data handling device includes a Management Component Transport Protocol (MCTP) endpoint. The BMC establishes a serial terminal session with the device operating system via the MCTP endpoint.
    Type: Application
    Filed: December 30, 2020
    Publication date: June 30, 2022
    Inventors: Akkiah Maddukuri, Robert Stevens, Deepaganesh Paulraj, Elie Jreij, Rama Bisa
  • SYSTEM AND METHOD FOR GRAPHICS PROCESSING UNIT MANAGEMENT INFRASTRUCTURE FOR REAL TIME DATA COLLECTION
    Publication number: 20210216480
    Abstract: An information handling system includes a first graphics processing unit (GPU) with a first high-speed interface, a second GPU with a second high-speed interface coupled to the first high-speed interface, and a baseboard management controller (BMC). The first GPU is configured to receive a command to provide management data to the BMC, and to provide first management data associated with the first GPU to the first GPU via the first high-speed interface in response to receiving the command. The second GPU is configured to receive the command, to receive the first management data via the second high-speed interface in response to receiving the command, and to provide the first management data and second management data associated with the second GPU to the BMC in further response to the command.
    Type: Application
    Filed: January 9, 2020
    Publication date: July 15, 2021
    Inventors: Chitrak Gupta, Rama Bisa, Rajeshkumar Patel, Chandrasekhar Puthilathe, John R. Palmer, Akkiah Maddukuri, Pavan Gavvala
  • System and method for graphics processing unit management infrastructure for real time data collection
    Patent number: 11061838
    Abstract: An information handling system includes a first graphics processing unit (GPU) with a first high-speed interface, a second GPU with a second high-speed interface coupled to the first high-speed interface, and a baseboard management controller (BMC). The first GPU is configured to receive a command to provide management data to the BMC, and to provide first management data associated with the first GPU to the first GPU via the first high-speed interface in response to receiving the command. The second GPU is configured to receive the command, to receive the first management data via the second high-speed interface in response to receiving the command, and to provide the first management data and second management data associated with the second GPU to the BMC in further response to the command.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: July 13, 2021
    Assignee: Dell Products L.P.
    Inventors: Chitrak Gupta, Rama Bisa, Rajeshkumar Patel, Chandrasekhar Puthilathe, John R. Palmer, Akkiah Maddukuri, Pavan Gavvala
  • System and method for graphics processing unit firmware updates
    Patent number: 10996942
    Abstract: An information handling system includes a processor, a graphics processing unit (GPU) including an interrupt interface coupled to the processor, and a low-speed interface, and a baseboard management controller (BMC) coupled to the low-speed interface. The GPU is configured to receive a first command from the BMC via the low-speed interface to halt processing data, to send a first interrupt to the processor via the interrupt interface in response to receiving the first command, to determine that the processor has halted sending data to the first GPU in response to the first interrupt, and to send a first reply to the command in response to determining that the processor has halted sending data. The BMC is configured to reboot the first GPU without rebooting the processor in response to receiving the first reply.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: May 4, 2021
    Assignee: Dell Products L.P.
    Inventors: Rama Bisa, Pavan Gavvala, Chitrak Gupta, Rajeshkumar Patel, Akkiah Maddukuri
  • PCI express channel implementation in intelligent platform management interface stack
    Patent number: 9043527
    Abstract: Certain embodiments of the present disclosure are directed to a baseboard management controller (BMC) that includes a PCI express (PCIe) interface controller configured to provide access to a PCIe channel over a PCIe link, and firmware. The firmware includes a PCIe module being configured to access the PCIe channel through the PCIe interface controller and registered as a PCIe function. A software stack of the BMC communicates, through the PCIe module, with a PCIe device over the PCIe channel.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: May 26, 2015
    Assignee: AMERICAN MEGATRENDS, INC.
    Inventors: Anurag Bhatia, Rama Bisa
  • PCI EXPRESS CHANNEL IMPLEMENTATION IN INTELLIGENT PLATFORM MANAGEMENT INTERFACE STACK
    Publication number: 20140195711
    Abstract: Certain embodiments of the present disclosure are directed to a baseboard management controller (BMC) that includes a PCI express (PCIe) interface controller configured to provide access to a PCIe channel over a PCIe link, and firmware. The firmware includes a PCIe module being configured to access the PCIe channel through the PCIe interface controller and registered as a PCIe function. A software stack of the BMC communicates, through the PCIe module, with a PCIe device over the PCIe channel.
    Type: Application
    Filed: January 4, 2013
    Publication date: July 10, 2014
    Applicant: AMERICAN MEGATRENDS, INC.
    Inventors: Anurag Bhatia, Rama Bisa