Abstract: An aspect of behavior of an embedded system may be determined by (a) determining a baseline behavior of the embedded system from a sequence of patterns in real-time digital measurements extracted from the embedded system; (b) extracting, while the embedded system is operating, real-time digital measurements from the embedded system; (c) extracting features from the real-time digital measurements extracted from the embedded system while the embedded system was operating; and (d) determining the aspect of the behavior of the embedded system by analyzing the extracted features with respect to features of the baseline behavior determined.

Abstract: An aspect of behavior of an embedded system may be determined by (a) determining a baseline behavior of the embedded system from a sequence of patterns in real-time digital measurements extracted from the embedded system; (b) extracting, while the embedded system is operating, real-time digital measurements from the embedded system; (c) extracting features from the real-time digital measurements extracted from the embedded system while the embedded system was operating; and (d) determining the aspect of the behavior of the embedded system by analyzing the extracted features with respect to features of the baseline behavior determined.

Abstract: Exemplary system, method, and computer-accessible medium for protecting at least one integrated circuit (IC) design, includes generating an abstract syntax tree (“AST”) based on a hardware description language and a first register-transfer level (RTL) design. The method also includes selecting semantic elements in the AST to lock and locking the selected semantic elements. Additionally, the method includes a procedure for generating a second RTL design.

Abstract: The goal of detecting modifications, such as unauthorized modifications for example, of the code and/or behavior of an embedded device (e.g., unexpected/unauthorized remote reprogramming, re-flashing), changes to code at run-time (e.g.

Abstract: An exemplary system, method and computer-accessible medium for determining a starting point of a header field(s) in a network packet(s) can be provided, which can include, for example receiving the network(s) packet, determining a header location of the header field(s) in the network packet(s), determining a delimiter location of a delimiter(s) in the network packet(s), and determining the starting point of the header field(s) based on the header and delimiter locations. The header location can be determined using a header finder module. The delimiter location can be determined using a delimiter finder module. The header and delimiter locations can be determined using a plurality of comparators arranged into a plurality of sets.

Abstract: An exemplary system, method and computer-accessible medium can be provided which can include, for example, generating a super control dataflow graph(s) (CDFG) by applying a plurality of electronic system level ESL design constraints associated with an integrated circuit, determining an upper bound(s) number and a lower bound(s) number based on a number of CDFGs in the super CDFG(s)—with each number being one metric of a capability of the integrated circuit to resist reverse engineering attack—, and inserting a component(s) into a register transfer level netlist to effectuate a modification of the upper bound(s) and the lower bound(s).

Abstract: Exemplary systems, methods and computer-accessible mediums can secure split manufacturing of an integrated circuit by modifying a previous location of at least one pin to a further location of the at least one pin based on a fault analysis procedure. A determination of the further location can include an iterative procedure that can be a greedy iterative procedure. The modification of the location of the at least one partition pin can be performed by swapping at least one further partition pin with the at least one partition pin.

Abstract: An exemplary system for wrapping an intellectual property core (IP) bus master(s), can include, for example, a plurality of IP cores associated with the IP core bus master(s), and a wrapper module connected to a serial input of the IP core bus master(s) and a serial output of the IP core bus master(s), where the wrapper module can be configured to capture and shift a plurality of values of a system bus for a plurality of bus transfers associated with the IP core bus master(s) and the IP cores. The wrapper module can be further configured to modify a wrapper control logic and a wrapper boundary register of the IP core bus master(s). A plurality of terminals can be included, which can be coupled to the IP core bus master(s), and a plurality of wrapper cells can be included, which can be associated with the plurality of terminals.

Abstract: An exemplary system, method and computer-accessible medium for detecting the presence of a Trojan(s) in a circuit(s), can include, for example, receiving information related to a property(s) configured to determine the presence of the Trojan(s), and determining the presence of the Trojan(s) based on the property(s) and a design(s) of the circuit(s) using a bounded model checking tool.

Abstract: Exemplary systems, methods and computer-accessible mediums can encrypting a circuit by determining at least one location to insert at least one gate in the circuit using a fault analysis, and inserting the at least one gate in at least one section of the at least one location. The determination can include an iterative procedure that can be a greedy iterative procedure. The determination can be based on an effect of the particular location on a maximum number of outputs of the circuit.

Abstract: An exemplary system, method and computer-accessible medium for detecting the presence of a Trojan(s) in a circuit(s), can include, for example, receiving information related to a property(s) configured to determine the presence of the Trojan(s), and determining the presence of the Trojan(s) based on the property(s) and a design(s) of the circuit(s) using a bounded model checking tool.

Abstract: Exemplary systems, methods and computer-accessible mediums can be provided that can, for example, determine a camouflaging location(s) of the logic gate(s) using a fault analysis procedure, and can camouflage the logic gate(s) at the location(s) based on the determination. The camouflaging procedure can be performed by replacing the logic gate(s) at the camouflaging location(s) with a further camouflaged gate, which can have a dummy contact(s) or a vias.

Abstract: The goal of detecting modifications, such as unauthorized modifications for example, of the code and/or behavior of an embedded device (e.g., unexpected/unauthorized remote reprogramming, re-flashing), changes to code at run-time (e.g.

Abstract: An exemplary system for wrapping an intellectual property core (IP) bus master(s), can include, for example, a plurality of IP cores associated with the IP core bus master(s), and a wrapper module connected to a serial input of the IP core bus master(s) and a serial output of the IP core bus master(s), where the wrapper module can be configured to capture and shift a plurality of values of a system bus for a plurality of bus transfers associated with the IP core bus master(s) and the IP cores. The wrapper module can be further configured to modify a wrapper control logic and a wrapper boundary register of the IP core bus master(s). A plurality of terminals can be included, which can be coupled to the IP core bus master(s), and a plurality of wrapper cells can be included, which can be associated with the plurality of terminals.

Abstract: Exemplary systems, methods and computer-accessible mediums for encrypting at least one integrated circuit (IC) can include determining, using an interference graph, at least one location for a proposed insertion of at least one gate in or at the at least one IC, and inserting the gate(s) into the IC(s) at the location(s). The interference graph can be constructed based at least in part on an effect of the location(s) on at least one further location of the IC(s).

Abstract: An exemplary system, method and computer-accessible medium for determining a starting point of a header field(s) in a network packet(s) can be provided, which can include, for example receiving the network(s) packet, determining a header location of the header field(s) in the network packet(s), determining a delimiter location of a delimiter(s) in the network packet(s), and determining the starting point of the header field(s) based on the header and delimiter locations. The header location can be determined using a header finder module. The delimiter location can be determined using a delimiter finder module. The header and delimiter locations can be determined using a plurality of comparators arranged into a plurality of sets.

Abstract: An exemplary system, method and computer-accessible medium can be provided which can include, for example, generating a super control dataflow graph(s) (CDFG) by applying a plurality of electronic system level ESL design constraints associated with an integrated circuit, determining an upper bound(s) number and a lower bound(s) number based on a number of CDFGs in the super CDFG(s)—with each number being one metric of a capability of the integrated circuit to resist reverse engineering attack—, and inserting a component(s) into a register transfer level netlist to effectuate a modification of the upper bound(s) and the lower bound(s).

Abstract: Exemplary systems, methods and computer-accessible mediums can be provided that can, for example, determine a camouflaging location(s) of the logic gate(s) using a fault analysis procedure, and can camouflage the logic gate(s) at the location(s) based on the determination. The camouflaging procedure can be performed by replacing the logic gate(s) at the camouflaging location(s) with a further camouflaged gate, which can have a dummy contact(s) or a vias.

Abstract: An exemplary system, method and computer-accessible medium for detecting the presence of a Trojan(s) in a circuit(s), can include, for example, receiving information related to a property(s) configured to determine the presence of the Trojan(s), and determining the presence of the Trojan(s) based on the property(s) and a design(s) of the circuit(s) using a bounded model checking tool.

Abstract: An exemplary system, method and computer-accessible medium for detecting the presence of a Trojan(s) in a circuit(s), can include, for example, receiving information related to a property(s) configured to determine the presence of the Trojan(s), and determining the presence of the Trojan(s) based on the property(s) and a design(s) of the circuit(s) using a bounded model checking tool.