Patents by Inventor Ramesh Kothandapani

Ramesh Kothandapani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220359351
    Abstract: A microelectronics package assembly and process of making same are disclosed. The flange has an upper surface and a first coating disposed on the upper surface of the flange. The insulator has a bottom surface for mounting onto the flange and an upper surface opposite the bottom surface. A second coating is disposed on the bottom surface of the insulator and a third coating disposed on the upper surface of the insulator. The first coating, the second coating, and the third coating each have a thickness of less than or equal to 1 micron. At least one of the first coating, the second coating, and the third coating is applied via at least one of physical vapor deposition, atomic deposition, or chemical deposition.
    Type: Application
    Filed: May 5, 2022
    Publication date: November 10, 2022
    Applicant: Materion Corporation
    Inventors: Ramesh KOTHANDAPANI, Christopher Johnson, ZhenWei Tee, Noel De Leon, SinLi Tan
  • Publication number: 20210257270
    Abstract: A cover lid for use with a semiconductor package is disclosed. First, a polyamide mask is applied to one surface of the lid plate. Next, the exposed areas of the surface, as well as the sides of the lid plate, are metallized. The polyamide mask can then be removed. This reduces pullback and shrinkage of the metallized layer, while lowering the manufacturing cost and process times.
    Type: Application
    Filed: May 5, 2021
    Publication date: August 19, 2021
    Applicant: MATERION CORPORATION
    Inventor: Ramesh Kothandapani
  • Patent number: 11049777
    Abstract: A frame lid for use with a semiconductor package is disclosed. First, a mask is applied to a top surface of the lid and over a central area of the top surface to define a peripheral area. Next, a seal ring is formed by metallizing the peripheral area and the sidewall of the plate. The mask can then be removed obtain the frame lid. Next, a solder preform can be attached to the seal ring. This reduces pullback and shrinkage of the metallized layer, while lowering the manufacturing cost and process times.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: June 29, 2021
    Assignee: MATERION CORPORATION
    Inventor: Ramesh Kothandapani
  • Patent number: 11031309
    Abstract: A cover lid for use with a semiconductor package is disclosed. First, a polyamide mask is applied to one surface of the lid plate. Next, the exposed areas of the surface, as well as the sides of the lid plate, are metallized. The polyamide mask can then be removed. This reduces pullback and shrinkage of the metallized layer, while lowering the manufacturing cost and process times.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: June 8, 2021
    Assignee: MATERION CORPORATION
    Inventor: Ramesh Kothandapani
  • Patent number: 10357841
    Abstract: A cap assembly for optical communications comprising a housing that includes a front side perpendicular from a bottom side, opposing parallel first and second sides perpendicular from the bottom side, and a back side disposed perpendicularly between the first side and the second side offset from respective ends of the first side and the second side opposite the front side. The back side includes an opening there-through and a three-sided ledge formed along an interior of the first side leg, an exterior of the back side, and an interior of the second side leg. The cap assembly further includes a window configured to contact the three-sided ledge of the back side, the glass panel covering the opening there-through and attached to the assembly via a solder pre-form.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: July 23, 2019
    Assignee: MATERION CORPORATION
    Inventors: Ramesh Kothandapani, Chee Kong Lee
  • Patent number: 10211115
    Abstract: A frame lid for use with a semiconductor package is disclosed. First, a mask is applied to a top surface of the lid and over a central area of the top surface to define a peripheral area. Next, a seal ring is formed by metallizing the peripheral area and the sidewall of the plate. The mask can then be removed obtain the frame lid. Next, a solder preform can be attached to the seal ring. This reduces pullback and shrinkage of the metallized layer, while lowering the manufacturing cost and process times.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: February 19, 2019
    Assignee: MATERION CORPORATION
    Inventor: Ramesh Kothandapani
  • Publication number: 20170239756
    Abstract: Methods of making solder preforms are disclosed. A ribbon of raw material is received, and a first annular solder preform is formed by laser cutting the ribbon. The edges of the first annular solder preform can then be cleaned. The cutout section removed from the middle of the first annular solder preform can then be laser cut to form a second annular solder preform that is smaller than the first annular solder preform.
    Type: Application
    Filed: February 17, 2017
    Publication date: August 24, 2017
    Inventors: Ramesh Kothandapani, SinLi Tan, Chee Kong Lee
  • Publication number: 20170229361
    Abstract: A cover lid for use with a semiconductor package is disclosed. First, a polyamide mask is applied to one surface of the lid plate. Next, the exposed areas of the surface, as well as the sides of the lid plate, are metallized. The polyamide mask can then be removed. This reduces pullback and shrinkage of the metallized layer, while lowering the manufacturing cost and process times.
    Type: Application
    Filed: May 21, 2015
    Publication date: August 10, 2017
    Inventor: Ramesh Kothandapani
  • Publication number: 20170229360
    Abstract: A frame lid for use with a semiconductor package is disclosed. First, a mask is applied to a top surface of the lid and over a central area of the top surface to define a peripheral area. Next, a seal ring is formed by metallizing the peripheral area and the sidewall of the plate. The mask can then be removed obtain the frame lid. Next, a solder preform can be attached to the seal ring. This reduces pullback and shrinkage of the metallized layer, while lowering the manufacturing cost and process times.
    Type: Application
    Filed: April 28, 2017
    Publication date: August 10, 2017
    Inventor: Ramesh Kothandapani
  • Publication number: 20170095870
    Abstract: A cap assembly for optical communications comprising a housing that includes a front side perpendicular from a bottom side, opposing parallel first and second sides perpendicular from the bottom side, and a back side disposed perpendicularly between the first side and the second side offset from respective ends of the first side and the second side opposite the front side. The back side includes an opening there-through and a three-sided ledge formed along an interior of the first side leg, an exterior of the back side, and an interior of the second side leg. The cap assembly further includes a window configured to contact the three-sided ledge of the back side, the glass panel covering the opening there-through and attached to the assembly via a solder pre-form.
    Type: Application
    Filed: December 15, 2016
    Publication date: April 6, 2017
    Inventors: Ramesh Kothandapani, Chee Kong Lee
  • Patent number: 9560781
    Abstract: A cap assembly for optical communications comprising a housing that includes a front side perpendicular from a bottom side, opposing parallel first and second sides perpendicular from the bottom side, and a back side disposed perpendicularly between the first side and the second side offset from respective ends of the first side and the second side opposite the front side. The back side includes an opening there-through and a three-sided ledge formed along an interior of the first side leg, an exterior of the back side, and an interior of the second side leg. The cap assembly further includes a window configured to contact the three-sided ledge of the back side, the window covering the opening there-through and attached to the assembly via a solder pre-form.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: January 31, 2017
    Inventors: Ramesh Kothandapani, Chee Kong Lee
  • Publication number: 20150340298
    Abstract: A frame lid for use with a semiconductor package is disclosed. First, a mask is applied to a top surface of the lid and over a central area of the top surface to define a peripheral area. Next, a seal ring is formed by metallizing the peripheral area and the sidewall of the plate. The mask can then be removed obtain the frame lid. Next, a solder preform can be attached to the seal ring. This reduces pullback and shrinkage of the metallized layer, while lowering the manufacturing cost and process times.
    Type: Application
    Filed: May 21, 2015
    Publication date: November 26, 2015
    Inventor: Ramesh Kothandapani
  • Patent number: 8975176
    Abstract: The amount of gold required for bonding a semiconductor die to an electronic package is reduced by using a sheet preform tack welded to the package prior to mounting the die. The preform, only slightly larger than a semiconductor die to be attached to the package, is placed in the die bond location and tack welded to the package at two spaced locations.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: March 10, 2015
    Assignee: Materion Corporation
    Inventor: Ramesh Kothandapani
  • Publication number: 20140264949
    Abstract: The amount of gold required for bonding a semiconductor die to an electronic package is reduced by using a sheet preform tack welded to the package prior to mounting the die. The preform, only slightly larger than a semiconductor die to be attached to the package, is placed in the die bond location and tack welded to the package at two spaced locations.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 18, 2014
    Applicant: Materion Corporation
    Inventor: Ramesh Kothandapani