Patents by Inventor Ramesh R. Kodnani

Ramesh R. Kodnani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6206997
    Abstract: A method for bonding heat sinks to packaged electronic components comprises the steps of: (a) exposing to a plasma a surface of a molded polymer formed on a substrate; (b) allowing the plasma to at least partially convert silicon-containing residue on the surface to silica; and (c) bonding an article to the surface by applying an adherent material between the article and the surface. Often, the silicon-containing residue is silicone oil, a mold release compound, which may prevent the formation of a bond when using conventional bonding methods and materials. The silica layer formed on the surface of the molded polymer assists in formation of a proper bond. The plasma may be an oxygen plasma and the adherent material may be selected from either a heat cured silicone-based paste adhesive with a metal oxide filler or a heat cured porous polymer film impregnated with adhesive.
    Type: Grant
    Filed: February 11, 1999
    Date of Patent: March 27, 2001
    Assignee: International Business Machines Corporation
    Inventors: Frank D. Egitto, Michael A. Gaynes, Ramesh R. Kodnani, Luis J. Matienzo, Mark V. Pierson
  • Patent number: 6193576
    Abstract: A method for aligning a plurality of thin film transistor tiles for constructing a flat panel display. A coverplate is arranged on a coverplate support. A first layer of a bonding material is applied to at least one of a first side of each of the tiles and a surface of the coverplate on which the tiles are to be secured. The tiles are arranged on the coverplate, such that the first layer of bonding material is arranged between the tiles and the coverplate. The tiles are connected to an alignment apparatus. The tiles are aligned relative to each other and the coverplate. The tiles are at least partially secured to the coverplate.
    Type: Grant
    Filed: May 19, 1998
    Date of Patent: February 27, 2001
    Assignee: International Business Machines Corporation
    Inventors: Michael A. Gaynes, Allan O. Johnson, Ramesh R. Kodnani, Mark V. Pierson, Edward J. Tasillo
  • Patent number: 6174406
    Abstract: Two surfaces are adhesively bonded together by providing on one of the surfaces a central, single point adhesive contact deposit and providing on one of the surfaces, adhesive extending from a central point deposit in a spoke-like array diagonally across substantially the entire surface. Also provided is the article obtained by the above method as well as the assembly used for bonding the two surfaces together. The surfaces are brought together, one on top of the other, with the adhesive located between the surfaces to cause the adhesive to spread out and cover the surfaces to thereby bond them together.
    Type: Grant
    Filed: April 9, 1998
    Date of Patent: January 16, 2001
    Assignee: International Business Machines Corporation
    Inventors: Michael A. Gaynes, Ramesh R. Kodnani
  • Patent number: 6129804
    Abstract: A system for aligning and attaching together a plurality of thin film transistor tiles for constructing a flat panel display. A coverplate loading station where a coverplate that the tiles are to be attached to is arranged on a coverplate support. A coverplate bonding material dispensing station where a bonding material for bonding the tiles to the coverplate is applied to a surface of the coverplate. A tile placement station where the tiles are arranged on the coverplate. A tile aligning and securing station where the tiles are aligned relative to each other and the coverplate by the tile aligner and where the tiles are at least partially bonded to the coverplate. A tile assembly bonding material dispensing station where a bonding material is applied to a surface of the tiles opposite the side that the coverplate is bonded to. A backplate placement station where a backplate is arranged on the tiles.
    Type: Grant
    Filed: May 1, 1998
    Date of Patent: October 10, 2000
    Assignee: International Business Machines Corporation
    Inventors: Michael A. Gaynes, Allan O. Johnson, Ramesh R. Kodnani, Mark V. Pierson, Edward J. Tasillo
  • Patent number: 5980348
    Abstract: A method for aligning a plurality of thin film transistor tiles for constructing a flat panel display. A coverplate is arranged on a coverplate support. A first layer of a bonding material is applied to at least one of a first side of each of the tiles and a surface of the coverplate on which the tiles are to be secured. The tiles are arranged on the coverplate, such that the first layer of bonding material is arranged between the tiles and the coverplate. The tiles are connected to an alignment apparatus. The tiles are aligned relative to each other and the coverplate. The tiles are at least partially secured to the coverplate.
    Type: Grant
    Filed: May 19, 1998
    Date of Patent: November 9, 1999
    Assignee: International Business Machines Corporation
    Inventors: Michael A. Gaynes, Allan O. Johnson, Ramesh R. Kodnani, Mark V. Pierson, Edward J. Tasillo
  • Patent number: 5973389
    Abstract: A semiconductor chip carrier assembly which includes a flexible substrate having a metallicized path on one of its surfaces in electrical communication with a semiconductor chip. A stiffener is disposed adjacent to said flexible substrate and is bonded thereto by an adhesive composition. The adhesive composition which comprises a microporous film laden with a curable adhesive is disposed between the flexible substrate and the stiffener. A cover plate is adhesively bonded to the semiconductor chip and to the stiffener. A process of making the assembly involving disposition of the flexible substrate in a vacuum fixture upon which the adhesive composition and stiffener is placed followed by the application of heat and pressure to cure the curable adhesive is also described.
    Type: Grant
    Filed: April 22, 1997
    Date of Patent: October 26, 1999
    Assignee: International Business Machines Corporation
    Inventors: Thomas M. Culnane, Michael A. Gaynes, Ramesh R. Kodnani, Mark V. Pierson, Charles G. Woychik
  • Patent number: 5889321
    Abstract: A stiffener (34 or 52 or 72) includes a pathway which allows gases and fluids, such as air, to be vented from the interface between surface bonding regions (35 or 60 or 74) of the stiffener and an adhesive (38 or 56 or 80) on a flexible substrate (36 or 54 or 78). The pathway may take the form of a porous material used for the stiffener or one or more bore holes (58 or 59 or 70) formed in the stiffener. The stiffener may also include an internal cavity (76) for promoting venting of fluids and gases. By venting fluid and gases from the adhesive/stiffener interface, better adhesion between the stiffener and flexible substrate is achieved.
    Type: Grant
    Filed: June 17, 1997
    Date of Patent: March 30, 1999
    Assignee: International Business Machines Corporation
    Inventors: Thomas M. Culnane, Michael A. Gaynes, Ramesh R. Kodnani, Mark V. Pierson