Abstract: A multi-core processing environment (MCPE) capable of quantifying shared system resource (SSR) access includes several processing cores, each core having several applications running thereon and accessing SSRs via virtual machines (VM). Each core includes core-specific shared memory and a guest operating system (GOS) for writing timestamped VM data entries to a core-specific data queue, each entry identifying an activated VM and its activation time. Hypervisor-accessible memory stores performance monitor registers (PMR) for monitoring specific MCPE features as well as PMR data queues for each core, the PMR data including timestamped values of the monitored features. The hypervisor writes the VM/PMR data to the corresponding queues and frequently samples PMR data. A correlation module correlates the queued VM/PMR data to determine execution times of each activated VM and (for each execution time) counts of PMR changes, each PMR change corresponding to an SSR access by a core of the MCPE.

Abstract: A method of managing NAND flash memory in an electronic device whereby system performance of the electronic device is minimally impacted is disclosed. The method comprises collecting files that are marked for deletion or truncation; monitoring an activity level of the electronic device; monitoring a total size of the list of files that are marked for deletion or truncation; determining if the electronic device is idle; and trimming the flash memory of the electronic device if predetermined criteria are met.

Abstract: A mobile computing device may be configured to run more than one operating system. Each operating system may require one or more specialized buttons to perform or enable various functions. The layout, shape, and function corresponding the buttons for each operating system may be unique. Adapting the buttons for a particular operating system may be accomplished by using soft buttons displayed as part of the graphical user interface. Here, however, valuable display area must be dedicated to the buttons. Another adaptation approach requires reconfiguring the hardware. Both approaches have drawbacks. In the invention disclosed, two sets of hardware buttons are incorporated in the same touch panel. Enabling a button is based on the choice of operating system. Enabled buttons are visible and operable while not enabled buttons or not visible and not operable. In this way, the hardware buttons in the mobile computing device may be reconfigured without using display area and without requiring hardware disassembly.

Abstract: A method of managing NAND flash memory in an electronic device whereby system performance of the electronic device is minimally impacted is disclosed. The method comprises collecting files that are marked for deletion or truncation; monitoring an activity level of the electronic device; monitoring a total size of the list of files that are marked for deletion or truncation; determining if the electronic device is idle; and trimming the flash memory of the electronic device if predetermined criteria are met.

Abstract: A mobile computing device may be configured to run more than one operating system. Each operating system may require one or more specialized buttons to perform or enable various functions. The layout, shape, and function corresponding the buttons for each operating system may be unique. Adapting the buttons for a particular operating system may be accomplished by using soft buttons displayed as part of the graphical user interface. Here, however, valuable display area must be dedicated to the buttons. Another adaptation approach requires reconfiguring the hardware. Both approaches have drawbacks. In the invention disclosed, two sets of hardware buttons are incorporated in the same touch panel. Enabling a button is based on the choice of operating system. Enabled buttons are visible and operable while not enabled buttons or not visible and not operable. In this way, the hardware buttons in the mobile computing device may be reconfigured without using display area and without requiring hardware disassembly.