Patents by Inventor Ran Halutz
Ran Halutz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11321092Abstract: A processor includes an internal memory and processing circuitry. The internal memory is configured to store a definition of a multi-dimensional array stored in an external memory, and indices that specify elements of the multi-dimensional array in terms of multi-dimensional coordinates of the elements within the array. The processing circuitry is configured to execute instructions in accordance with an Instruction Set Architecture (ISA) defined for the processor. At least some of the instructions in the ISA access the multi-dimensional array by operating on the multi-dimensional coordinates specified in the indices.Type: GrantFiled: October 25, 2018Date of Patent: May 3, 2022Assignee: HABANA LABS LTD.Inventors: Shlomo Raikin, Sergei Gofman, Ran Halutz, Evgeny Spektor, Amos Goldman, Ron Shalev
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Patent number: 11249724Abstract: A computational apparatus includes a memory unit and Read-Modify-Write (RMW) logic. The memory unit is configured to hold a data value. The RMW logic, which is coupled to the memory unit, is configured to perform an atomic RMW operation on the data value stored in the memory unit.Type: GrantFiled: August 28, 2019Date of Patent: February 15, 2022Assignee: HABANA LABS LTD.Inventors: Shlomo Raikin, Ron Shalev, Sergei Gofman, Ran Halutz, Nadav Klein
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Patent number: 10915494Abstract: A vector processor includes a coefficient memory and a processor. The processor has an Instruction Set Architecture (ISA), which includes an instruction that approximates a mathematical function by a polynomial. The processor is configured to approximate the mathematical function over an argument, by reading one or more coefficients of the polynomial from the coefficient memory and evaluating the polynomial at the argument using the coefficients.Type: GrantFiled: November 11, 2018Date of Patent: February 9, 2021Assignee: HABANA LABS LTD.Inventors: Ron Shalev, Evgeny Spektor, Sergei Gofman, Ran Halutz, Shlomo Raikin, Hilla Ben Yaacov
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Patent number: 10915297Abstract: Computational apparatus includes a systolic array of processing elements. In each of a sequence of processing cycles, the processing elements in a first row of the array each receive a respective first plurality of first operands, while the processing elements in a first column of the array each receive a respective second plurality of second operands. Each processing element, except in the first row and first column, receives the respective first and second pluralities of the operands from adjacent processing elements in a preceding row and column of the array. Each processing element multiplies pairs of the first and second operands together to generate multiple respective products, and accumulates the products in accumulators. Synchronization logic loads a succession of first and second vectors of the operands into the array, and upon completion of processing triggers the processing elements to transfer respective data values from the accumulators out of the array.Type: GrantFiled: November 12, 2018Date of Patent: February 9, 2021Assignee: HABANA LABS LTD.Inventors: Ran Halutz, Tomer Rothschild, Ron Shalev
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Patent number: 10853070Abstract: A processor includes a processing engine, an address queue, an address generation unit, and logic circuitry. The processing engine is configured to process instructions that access data in an external memory. The address generation unit is configured to generate respective addresses for the instructions to be processed by the processing engine, to provide the addresses to the processing engine, and to write the addresses to the address queue. The logic circuitry is configured to access the external memory on behalf of the processing engine while compensating for variations in access latency to the external memory, by reading the addresses from the address queue, and executing the instructions in the external memory in accordance with the addresses read from the address queue.Type: GrantFiled: October 3, 2018Date of Patent: December 1, 2020Assignee: HABANA LABS LTD.Inventors: Ron Shalev, Evgeny Spektor, Ran Halutz
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Patent number: 10713214Abstract: Computational apparatus includes a systolic array of processing elements, each including a multiplier and first and second accumulators. In each of a sequence of processing cycles, the processing elements perform the following steps concurrently: Each processing element, except in the first row and first column of the array, receives first and second operands from adjacent processing elements in a preceding row and column of the array, respectively, multiplies the first and second operands together to generate a product, and accumulates the product in the first accumulator. In addition, each processing element passes a stored output data value from the second accumulator to a succeeding processing element along a respective column of the array, receives a new output data value from a preceding processing element along the respective column, and stores the new output data value in the second accumulator.Type: GrantFiled: September 20, 2018Date of Patent: July 14, 2020Assignee: HABANA LABS LTD.Inventors: Ron Shalev, Ran Halutz
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Patent number: 9772720Abstract: Control apparatus includes an optical subsystem, which is configured to direct first light toward a scene that includes a hand of a user in proximity to a wall of a room and to receive the first light that is reflected from the scene, and to direct second light toward the wall so as to project an image of a control device onto the wall. A processor is configured to control the optical subsystem so as to generate, responsively to the received first light, a depth map of the scene, to process the depth map so as to detect a proximity of the hand to the wall in a location of the projected image, and to control electrical equipment in the room responsively to the proximity.Type: GrantFiled: June 14, 2016Date of Patent: September 26, 2017Assignee: APPLE INC.Inventors: Alexander Shpunt, Raviv Erlich, Ronen Akerman, Ran Halutz
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Publication number: 20160291801Abstract: Control apparatus includes an optical subsystem, which is configured to direct first light toward a scene that includes a hand of a user in proximity to a wall of a room and to receive the first light that is reflected from the scene, and to direct second light toward the wall so as to project an image of a control device onto the wall. A processor is configured to control the optical subsystem so as to generate, responsively to the received first light, a depth map of the scene, to process the depth map so as to detect a proximity of the hand to the wall in a location of the projected image, and to control electrical equipment in the room responsively to the proximity.Type: ApplicationFiled: June 14, 2016Publication date: October 6, 2016Inventors: Alexander Shpunt, Raviv Erlich, Ronen Akerman, Ran Halutz
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Patent number: 9430138Abstract: Control apparatus includes an optical subsystem, which is configured to direct first light toward a scene that includes a hand of a user in proximity to a wall of a room and to receive the first light that is reflected from the scene, and to direct second light toward the wall so as to project an image of a control device onto the wall. A processor is configured to control the optical subsystem so as to generate, responsively to the received first light, a depth map of the scene, to process the depth map so as to detect a proximity of the hand to the wall in a location of the projected image, and to control electrical equipment in the room responsively to the proximity.Type: GrantFiled: February 13, 2014Date of Patent: August 30, 2016Assignee: APPLE INC.Inventors: Alexander Shpunt, Raviv Erlich, Ronen Akerman, Ran Halutz
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Publication number: 20140225824Abstract: Control apparatus includes an optical subsystem, which is configured to direct first light toward a scene that includes a hand of a user in proximity to a wall of a room and to receive the first light that is reflected from the scene, and to direct second light toward the wall so as to project an image of a control device onto the wall. A processor is configured to control the optical subsystem so as to generate, responsively to the received first light, a depth map of the scene, to process the depth map so as to detect a proximity of the hand to the wall in a location of the projected image, and to control electrical equipment in the room responsively to the proximity.Type: ApplicationFiled: February 13, 2014Publication date: August 14, 2014Applicant: PrimeSense Ltd.Inventors: Alexander Shpunt, Raviv Erlich, Ronen Akerman, Ran Halutz