Abstract: The present application provides a semiconductor device with a buried bit line and a preparation method thereof. The preparation method of a semiconductor device with a buried bit line includes: providing a substrate; forming bit line trenches; forming a bit line structure in the bit line trench; and forming word line structures in the substrate. The semiconductor device with a buried bit line includes a substrate, bit line trenches, a bit line structure, and word line structures.

Abstract: A method of digital measuring the color of fabrics based on digital camera, includes: making plain fabric samples; obtaining ground-truth color of plain fabrics using a spectrophotometer; capturing a raw format digital image of the plain fabrics using the digital camera and extracting raw camera responses of the plain fabrics; capturing a raw format digital image of a target fabric and extracting the raw camera responses of a ROI in the target fabric; calculating a Euclidean distance and a similarity coefficient between the raw camera responses of the ROI in the target fabric and the plain fabrics; normalizing the Euclidean distance and the similarity coefficient; calculating a weighting coefficient of each color data of the plain fabrics based on the normalized Euclidean distance and similarity coefficient; weighting every color data of plain fabrics with a corresponding weighting coefficient; and summing the weighted color data of the plain fabrics.

Abstract: A display substrate and a manufacturing method therefor, and a display device. The display substrate comprises a plurality of island areas that are spaced apart from each other, a plurality of hole areas, and bridge areas for connecting adjacent island areas. The island areas or/and the bridge areas comprise an edge area adjacent to the hole area; the edge area comprises a composite structure layer provided on a base substrate; a stepped structure is formed at a side surface of the composite structure layer facing the hole areas; the edge area further comprises an inorganic encapsulation layer disposed on the composite structure layer and the stepped structure.

Abstract: The invention provides a semiconductor structure and a fabrication method for same. The semiconductor structure comprises: a substrate; a plurality of word-line structures extending along a first direction on the substrate and arranged at intervals along a second direction, wherein the second direction is perpendicular to the first direction; a plurality of spacer structures disposed above the plurality of word-line structures, wherein at least one of the plurality of spacer structures comprises a first spacer layer and an air gap, the first spacer layer is disposed at a bottom portion of the spacer structures, the air gap is disposed on the first spacer layer, and the air gap is located between the plurality of first spacer layers along the second direction; and a plurality of contact plugs disposed between the plurality of spacer structures.

Abstract: Disclosed is a method for manufacturing a contact hole, a semiconductor structure and electronic equipment. The method includes: forming a mask layer on an upper end face of a first oxide layer of the semiconductor structure, and exposing a pattern of a target contact hole on the mask layer; exposing a portion, corresponding to a target contact hole, of an upper end face of a contact layer and a portion, corresponding to the target contact hole, of an upper end face of an upper layer structure; depositing a second insulation layer on an etched surface, and depositing a second oxide layer on the second insulation layer; and removing portions, above the upper end face of the first oxide layer, of the second insulation layer and the second oxide layer, and removing a part of the contact layer, and exposing an upper end face of a zeroth layer contact.

Abstract: The embodiment of the application provides a semiconductor structure and a method for forming a semiconductor structure. The method includes: a substrate structure is provided, in which the substrate structure at least including bit line structures and a plurality of landing pads, each of the plurality of landing pads is formed around a respective one of the bit line structures and covers a part of the respective one of the bit line structures, and a gap is formed between each two adjacent landing pads of the plurality of landing pads; and capacitive structures are formed on top surfaces of the plurality of landing pads and in the gaps.

Abstract: Techniques for hosting adding and warming a host are described. In some instances, a method of determining that at least one group of hosts is to be increased by adding an additional host to the group of hosts; sending a request to the group of hosts for a list of machine learning models loaded per host of the group of hosts; receiving, from each host, the list of loaded machine learning models; loading at least a proper subset of list of loaded machine learning models into random access memory of the at least one group; receiving a request to perform an inference; routing the request to the additional host of the group of hosts; performing an inference using the additional host of the group of hosts; and providing a result of the inference to an external entity is described.

Abstract: Herein are described two-dimensional metal organic frameworks (2D MOFs). The 2D MOFs includes a plurality of multivalent metals or metal ions and a plurality of multidentate ligands arranged to form a crystalline structure having a lateral size of at least about 2.5 ?m and a thickness of less than about 5 nm. Herein are also described methods for preparing the 2D MOFs. The 2D MOFs can be used, for example, in electrochromic devices such as smart windows and flexible displays.

Abstract: The present invention provides a sperm sorting chip and a method for sorting sperm using the same. Said sperm sorting chip includes: a flow channel structure sequentially configured with a gradually diverging flow field region, a main flow channel, and a gradually converging main flow channel intercommunicated with each other from a first side end to a second side end; a fluid injection port, a semen injection port, and a semen extraction port separately located at the first side end and communicated with a main input channel of the gradual diverging flow field region; and a waste fluid outlet located at the second side end and communicated with the gradually converging main flow channel. The gradually diverging flow field region further includes a plurality of sub-input channels derived from the main input channel and converged into the main flow channel, and the plurality of sub-input channels have a gradually widening channel width at the junction with the main flow channel.

Abstract: An impedance-type chip for real-time sensing sweat pressure, a micro-control system, and method thereof are provided for monitoring a physiological state of a subject. The impedance-type chip includes a substrate, a pair of comb-shaped electrodes, a first double-layered junction plate, a microfluidic channel plate, a second double-layered junction plate, and a sealing plate. Each the comb-shaped electrodes has a plurality of sub-electrodes and is disposed on the substrate to provide different impedance values. The first double-layered junction plate is disposed on the substrate, the microfluidic channel plate is disposed on the first double-layered junction plates, and the second double-layered junction plate is disposed on the microfluidic channel plate, wherein the first double-layered junction plate, the microfluidic channel plate, and the second double-layered junction plate have a microfluidic channel with a cavity.

Abstract: Systems, apparatuses, and methods are described for allocating content items for addressable content campaigns that target users with certain user characteristics and non-addressable content campaigns that request a certain quantity of deliveries in content delivery schedules. The insertions of addressable content items of the addressable content campaigns during slots in the content delivery schedules may be based on the predicted viewership (e.g., a number of views by targeted recipients) of the addressable content items during the slots. The deliveries of the content items from the addressable and non-addressable content campaigns may be scheduled to optimize values associated with viewings by targeted recipients of the assigned addressable content items and values associated with a quantity of deliveries of assigned non-addressable content items. The allocations of the contents items may also comply with various timing, geographical, delivery, slot inventory-related, and/or campaign specified constraints.

Abstract: Techniques and systems for reducing fouling in a polymerization system are described. The polymerization system includes a reactor coupled to a recycle system. The recycle system includes at least one fouling-susceptible unit. The technique includes inducing polymerization of a reactant, for example, at least one olefin monomer reactant, with a catalyst in the reactor. The technique may further include circulating a fluidizing stream through the reactor and the at least one fouling-susceptible unit. The fluidizing stream may include entrained particles tending to foul the at least one fouling-susceptible unit. The technique can further include contacting the fluidizing stream with a catalyst poison at at least one location upstream of the at least one fouling-susceptible unit in the recycle system.

Abstract: This document describes techniques and apparatuses for supporting web components associated with a document object model (DOM) corresponding to a data file in a web testing environment. A user interaction, relative to a web page or web application from which the DOM is rendered, is monitored in the web testing environment. The monitoring identifies a target element selected by the user that is referenced in a shadow DOM associated with the DOM. One or more parent shadow host elements of the DOM are identified relative to the target element. The one or more shadow host elements define a reduced path, with respect to a tree data structure representing the DOM and the shadow DOM, for linking a document object of the DOM to the target element. Indicia identifying the one or more shadow host elements as linking the document object of the DOM to the target element are recorded.

Abstract: The disclosure can provide an interactive method, an electronic device, and a storage medium for interacting on social media using social media accounts.

Abstract: A manufacturing method for a semiconductor structure includes: a semiconductor substrate is provided, the semiconductor substrate includes multiple first regions and second regions which are alternately disposed; multiple bitline structures are formed on the semiconductor substrate, any one of the bitline structures penetrates through the first regions and the second regions; the bitline structures in the first regions are etched, to enable each sidewall on two sides of each of the bitline structure to be in a step shape; and multiple electrode structures are formed, any one of the electrode structures includes a conductive plug and a contact pad in mutually electric connection, and each conductive plug is disposed at a respective first region, disposed between two neighboring bitline structures and connected to the semiconductor substrate.

Abstract: The present disclosure relates to the field of semiconductor technologies, and provides a semiconductor structure and a semiconductor structure manufacturing method. The semiconductor structure includes a substrate, a bitline, a bitline isolator, a peripheral gate and a gate isolator. A plurality of active regions are formed in the substrate. The bitline is located on the substrate and connected to the active region. The bitline isolator is located on the substrate and covers a sidewall of the bitline. The bitline isolator includes a first air gap. The peripheral gate is located on the substrate. The gate isolator is located on the substrate and covers a sidewall of the peripheral gate. The gate isolator includes a second air gap.

Abstract: A solid-state polymer electrolyte membrane and a supercapacitive lithium-ion battery utilizing the solid-state polymer electrolyte membrane. The solid-state polymer electrolyte membrane comprising a mixture of a lithium salt, a plasticizer, and a co-network of a crosslinkable polyether addition and a crosslinkable amine addition. The co-network is crosslinked, and the solid-state polymer electrolyte membrane is conductive on the order of 10?3 S cm?1. The supercapacitive lithium-ion battery utilizing the solid-state polymer electrolyte membrane has an operating range of between about 0.01 and about 4.3 V without short-circuiting while also having a higher capacity relative to conventional liquid electrolyte lithium-ion batteries.

Abstract: A memory and its manufacturing method are disclosed herein. The memory includes a substrate, active region in the substrate, and bitline structures on the substrate, the active region extending in a first direction; and capacitor contact windows, the capacitor contact window being located between adjacent ones of the bitline structures, at least one center line of a bottom surface of the capacitor contact window extending in a second direction, an angle between the second direction and the first direction being less than or equal to 45 degrees. The present disclosure is beneficial to improving the signal transmission performance of the memory.

Abstract: The present disclosure relates to a method, device, storage medium, and system for sharing a nail printing pattern. The method may include receiving the nail printing pattern and price information of the nail printing pattern uploaded by a first account via a first user terminal or a first nail printing device; verifying the nail printing pattern and the price information of the nail printing pattern based on a preset rule; and if the nail printing pattern qualifies for the preset rule, storing qualified nail printing pattern to a server.

Abstract: According to examples, an apparatus may include a processor that may identify and execute workflows based on simulated network addresses such as simulated uniform resource locations (“URLs”). The system may generate recorded automation scripts that automatically completes some or all of the tasks of a workflow. The system may store the automation scripts in association with the workflow and a simulated URL. The simulated URL may include a string that does not literally resolve to a document on a networked resource. Rather, the simulated URL may instead identify and indicate that a corresponding workflow is to be executed. A browser extension of a browser may intercept URLs that are provided to a browser, determine that a simulated URL has been entered, and provide the simulated URL to a replay engine that identifies and executes the automated script associated with the simulated URL.