Patents by Inventor Randall S. Springfield

Randall S. Springfield has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5987536
    Abstract: Disclosed is a personal computer system which includes a central processing unit (CPU) coupled to a direct access storage device (DASD) and a random access memory (RAM). A flash memory module is coupled to the CPU and an input/output (IO) bus and includes a basic input output system (BIOS) stored therein. The BIOS is effective for responding to the energization of the computer system by initiating a power on self test (POST). The BIOS is further operative on completion of the POST for transferring a portion of BIOS from the module to the RAM and for transferring control of the of the computer system to the BIOS portion. The portion of BIOS is operative to load a protected mode operating system (OS) into RAM and transfer control to the OS. The system further includes a logic circuit coupled to the flash memory module and the IO bus for allowing the BIOS in flash memory to be accessed while the protected mode OS is running.
    Type: Grant
    Filed: May 22, 1997
    Date of Patent: November 16, 1999
    Assignee: International Business Machines Corporation
    Inventors: Robert D. Johnson, Howard J. Locker, Jerry W. Pearce, Randall S. Springfield, Donald D. Williams
  • Patent number: 5860001
    Abstract: Disclosed is a computer system which can be powered on by at least a first and a second method wherein the first method is different from the second method. The computer system is operative to allow a user to select which one of at least two different pre-selected ordered lists of initial program load (IPL) devices are to be used depending on whether the system was powered on by the first method or the second method. The system includes a processor coupled to a local bus and an input/output (IO) bus. A non-volatile memory is coupled to the processor and the IO bus. The non-volatile memory has a basic input output system (BIOS) stored therein and the BIOS is effective for responding to the energization of the computer system by initiating a power on self test (POST). The non-volatile memory also stores a first pre-selected ordered list of IPL devices and a second pre-selected ordered list of IPL devices.
    Type: Grant
    Filed: May 19, 1997
    Date of Patent: January 12, 1999
    Assignee: International Business Machines Corporation
    Inventors: Daryl C. Cromer, Ellen M. Gibel, Robert D. Johnson, David Rhoades, Randall S. Springfield
  • Patent number: 5590373
    Abstract: A field programming tool for a personal communications device, provides an automatic, capability to update computer programs stored in the device. The personal communications device includes an electrically programmable read only memory (EPROM), that stores the operating system programs and the applications programs to be loaded into a random access memory (RAM) for executed by a central processing unit (CPU) in the device. A reprogramming card is provided for the device, containing pre-stored new programs that are to be loaded into the EPROM of the device. A method is provided for automatically loading the new programs from the reprogramming card into the EPROM, in an accurate, foolproof manner. This is accomplished using a sequencing program stored on the reprogramming card and loaded into the RAM of the device, where it is executed. An option attach connector alerts the device that the reprogramming card is connected to the PCMCIA slot of the device.
    Type: Grant
    Filed: July 25, 1994
    Date of Patent: December 31, 1996
    Assignee: International Business Machines Corporation
    Inventors: Wayne P. Whitley, Randall S. Springfield, Harold D. Hudson, Byron K. Tiller, David J. Allard, Daniel Ming-Te Hsieh, Julie F. Goodwin, Thomas T. Murakami, Francis J. Canova, Jr.