Abstract: The present invention relates to a digital current share apparatus and method for supplies in parallel wherein a digital current sharing is used to eliminate oscillations during current sharing by raising current in steps until the currents in power supplies in parallel are brought within a certain tolerance of one another.

Abstract: A circuit device and method for protecting EMC components from fault conditions that may negatively affect the components, such as high power dissipation in EMC components when/if the boost stage stops working or malfunctions and preventing smoke and fire in case the boost stage switching device fails, shorts, or is defective. The device is designed so that the chopper stage (following the boost stage) is latched off if/whenever the boost stage stops working. According to the methods of the invention, whenever such a fault occurs at the boost stage, the circuit immediately disables the stage that provides power to the output load (i.e., load-power-supply stage). This disabling of the load-power-supply stage then prevents very high currents from flowing through the EMC components and thus protects the EMC components from overheating and/or causing a fire or smoke.

Abstract: Disclosed is a circuit design and method for providing an open loop, single-output, high efficiency AC-DC regulated power supply. The circuit is designed with two boost stages (or a two-stage boost) coupled to a zero-voltage switched (ZVS) synchronous rectifier. The first boost stage comprises an inductive switching component coupled to a first capacitor and a pulse width modulator (PWM) via a diode and transistor, respectively. The second boost stage comprises the inductive component coupled to a MOSFET, diode, and capacitor. The second boost state runs at substantially 50% duty cycle for low line conditions and substantially 10% duty cycle for high line conditions, whereby the overall efficiency of the two-stage boost is substantially equal to a conventional boost stage. The circuit includes a DC-DC regulator section, which operates in ZVS mode at approximately 100% duty cycle.

Abstract: A boost circuit is disclosed. The circuit comprises a boost transistor, a pulse width modulator coupled to the boost transistor, and a boost inductor coupled to the boost transistor and the pulse width modulator, the boost inductor including a winding which provides an auxiliary output voltage. Through the use of the boost circuit in accordance with the present invention, the auxiliary output voltage is generated by the boost stage operation. Ergo, the present invention provides the auxiliary output voltage supply by using the same pulse width modulator and primary switching devices as used by the boost stage. The use of a boost circuit in accordance with the present invention thereby eliminates the need for the components required to maintain the auxiliary output voltage. Accordingly, system space can be saved and there is a reduction in manufacturing costs.

Abstract: A parallel power system with over voltage protection is disclosed. The parallel power system comprises at least two voltage regulators in parallel and an over voltage protection circuit for each of the at least two voltage regulators. The over voltage protection circuit comprises a transistor coupled to an associated voltage regulator and a detector coupled to each of the transistor for shutting off power to the associated voltage regulator if the associated voltage regulator is in an over voltage condition. Through the use of a circuit in accordance with the present invention, the computer processors are protected against being damaged as a result of an over-voltage condition in one of the voltage regulators. Moreover, the over voltage protection circuit in accordance with the present invention will isolate the voltage regulator that is experiencing an over voltage condition and shut it down, without shutting down the entire system.

Abstract: A boost doubler circuit is disclosed. The circuit comprises an input, a voltage on the input to an output voltage, a transistor arrangement coupled to the input, and a drive circuit coupled to the transistor arrangement for driving. The circuit further comprises an output coupled to the drive circuit, for receiving the output voltage, wherein an AC bridge rectifier is not required. Through the use of the boost doubler circuit in accordance with the present invention, the full wave rectifier bridge circuit of conventional boost circuitry is not required. Furthermore, since the full wave rectifier bridge has been eliminated from the circuit design, the EMC problems related to the rectifier bridge circuit are not prevalent in the present invention and also the additional power dissipation in the rectifier bridge is eliminated. This results in a more energy efficient boost circuit configuration.