Abstract: Radiation hardened NMOS devices suitable for application in NMOS, CMOS, or BiCMOS integrated circuits, and methods for fabricating them. A device includes a p-type silicon substrate, a field oxide surrounding a moat region on the substrate tapering through a bird's beak region to a gate oxide within the moat region, a heavily-doped p-type guard region underlying at least a portion of the bird's beak region and terminating at the inner edge of the bird's beak region, a gate crossing the moat region, and n-type source and drain regions spaced by a gap from the inner edge of the guard region. A variation of a local oxidation of silicon process is used with an additional bird's beak implantation mask as well as minor alterations to the conventional moat and n-type source/drain masks. The resulting devices have improved radiation tolerance while having a high breakdown voltage and minimal impact on circuit density.

Abstract: Wafer order is randomized in-situ by use of a separate wafer staging area and randomly shuffling wafers to and from this staging area to shuffle the processing order of the wafer lot. Positional data is captured for each wafer at both the send and receive ends of the process.

Abstract: Wafer order is randomized in-situ by use of a separate wafer staging area and randomly shuffling wafers to and from this staging area to shuffle the processing order of the wafer lot. Positional data is captured for each wafer at both the send and receive ends of the process.

Abstract: Wafer order is randomized in-situ by use of a separate wafer staging area and randomly shuffling wafers to and from this staging area to shuffle the processing order of the wafer lot. Positional data is captured for each wafer at both the send and receive ends of the process.

Abstract: Wafer order is randomized in-situ by use of a separate wafer staging area and randomly shuffling wafers to and from this staging area to shuffle the processing order of the wafer lot. Positional data is captured for each wafer at both the send and receive ends of the process.

Abstract: Wafer order is randomized in-situ by use of a separate wafer staging area and randomly shuffling wafers to and from this staging area to shuffle the processing order of the wafer lot. Positional data is captured for each wafer at both the send and receive ends of the process.

Abstract: Wafer order is randomized in-situ by use of a separate wafer staging area and randomly shuffling wafers to and from this staging area to shuffle the processing order of the wafer lot. Positional data is captured for each wafer at both the send and receive ends of the process.

Abstract: In a system (12) wherein articles are manufactured by a plurality of process steps (20, 22, & 24), a method for identifying causes of variations in performance of the manufactured articles is provided. The method includes tracking orientation data (48) for the articles during each of the process steps (20, 22, & 24) and then measuring (50) performance data for each of the articles. The method also includes preparing surface performance characteristic maps (54) for each of the articles from the performance data and ordering the surface performance characteristic maps (56) for each of the articles in accordance with the orientation data for each article at a given process step (20, 22, & 24).

Abstract: The apparatus (10) includes a batch wafer presentation system (12) receiving a cassette (14) carrying a plurality of wafers (16). The batch wafer presentation system (12) arranges the plurality of wafers (16) along an inclined presentation axis, .alpha., to simultaneously expose the bar code inscription on each wafer (16). A laser scanner (30) is mounted on an arm assembly (32) which travels long a track (34) parallel with the presentation axis. The laser scanner (30) is mounted such that its angular and spatial positions relative to the plurality of wafers (16) may be easily adjusted.

Abstract: The apparatus (10) includes a batch wafer presentation system (12) receiving a cassette (14) carrying a plurality of wafers (16). The batch wafer presentation system (12) arranges the plurality of wafers (16) along an inclined presentation axis, .alpha., to simultaneously expose the bar code inscription on each wafer (16). A laser scanner (30) is mounted on an arm assembly (32) which travels long a track (34) parallel with the presentation axis. The laser scanner (30) is mounted such that its angular and spatial positions relative to the plurality of wafers (16) may be easily adjusted.