Patents by Inventor Randy Bindrup
Randy Bindrup has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9741680Abstract: A stackable integrated circuit chip layer and module device that avoids the use of electrically conductive elements on the external surfaces of a layer containing an integrated circuit die by taking advantage of conventional wire bonding equipment to provide an electrically conductive path defined by a wire bond segment that is encapsulated in a potting material so as to define an electrically conductive wire bond “through-via” accessible from at least the lower or second surface of the layer.Type: GrantFiled: August 29, 2016Date of Patent: August 22, 2017Assignee: PFG IP LLCInventors: Randy Bindrup, W. Eric Boyd, John Leon, James Yamaguchi, Angel Pepe
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Patent number: 9431275Abstract: A stackable integrated circuit chip layer and module device that avoids the use of electrically conductive elements on the external surfaces of a layer containing an integrated circuit die by taking advantage of conventional wire bonding equipment to provide an electrically conductive path defined by a wire bond segment that is encapsulated in a potting material so as to define an electrically conductive wire bond “through-via” accessible from at least the lower or second surface of the layer.Type: GrantFiled: August 15, 2011Date of Patent: August 30, 2016Assignee: PFG IP LLCInventors: Randy Bindrup, W. Eric Boyd, John Leon, James Yamaguchi, Angel Pepe
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Patent number: 8637985Abstract: A method for electrically coupling an anti-tamper mesh to an electronic module or device using wire bonding equipment and a device made from the method. Stud bumps or free air ball bonds are electrically coupled to conductive mesh pads of an anti-tamper mesh. Respective module pads have a conductive epoxy disposed thereon for the receiving of the stud bumps or free air ball bonds, each of which are aligned and bonded together to electrically couple the anti-tamper mesh to predetermined module pads.Type: GrantFiled: February 10, 2012Date of Patent: January 28, 2014Assignee: ISC8 Inc.Inventors: Randy Bindrup, James Yamaguchi, W. Eric Boyd
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Patent number: 8609473Abstract: A method for fabricating a stackable integrated circuit layer and a device made from the method are disclosed. A stud bump is defined on the contact pad of an integrated circuit die and the stud-bumped die encapsulated in a potting material to define a potted assembly. A predetermined portion of the potting material is removed whereby a portion of the stud bump is exposed. One or more electrically conductive traces are defined on the layer surface and in electrical connection with the stud bump to reroute the integrated circuit contacts to predetermined locations on the layer to provide a stackable neolayer.Type: GrantFiled: October 12, 2011Date of Patent: December 17, 2013Assignee: ISC8 Inc.Inventors: Peter Lieu, James Yamaguchi, Randy Bindrup, W. Eric Boyd
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Publication number: 20120211886Abstract: A method for fabricating an integrated circuit chip-scale package and a device made from the method. One or more IC chips are mounted on a carrier and a stud bump defined on an IC pad. The stud-bumped IC is encapsulated to define a potted assembly layer which is thinned to expose the stud bump. Conductive first traces are defined and coupled to the stud bump to reroute the IC pads. A dielectric layer is provided and vias defined there through to expose the first traces. Electrically conductive second traces are disposed on the dielectric layer surface that are coupled to the first traces to reroute the IC pads to define a chip scale package.Type: ApplicationFiled: February 17, 2012Publication date: August 23, 2012Applicant: ISC8 Inc.Inventors: Peter Lieu, James Yamaguchi, Randy Bindrup, W. Eric Boyd
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Publication number: 20120205801Abstract: A method for electrically coupling an anti-tamper mesh to an electronic module or device using wire bonding equipment and a device made from the method. Stud bumps or free air ball bonds are electrically coupled to conductive mesh pads of an anti-tamper mesh. Respective module pads have a conductive epoxy disposed thereon for the receiving of the stud bumps or free air ball bonds, each of which are aligned and bonded together to electrically couple the anti-tamper mesh to predetermined module pads.Type: ApplicationFiled: February 10, 2012Publication date: August 16, 2012Inventors: Randy Bindrup, James Yamaguchi, W. Eric Boyd
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Publication number: 20120068333Abstract: A stackable integrated circuit chip layer and module device that avoids the use of electrically conductive elements on the external surfaces of a layer containing an integrated circuit die by taking advantage of conventional wire bonding equipment to provide an electrically conductive path defined by a wire bond segment that is encapsulated in a potting material so as to define an electrically conductive wire bond “through-via” accessible from at least the lower or second surface of the layer.Type: ApplicationFiled: August 15, 2011Publication date: March 22, 2012Applicant: Irvine Sensors CorporationInventors: Randy Bindrup, W. Eric Boyd, John Leon, James Yamaguchi
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Publication number: 20120068336Abstract: A method for fabricating a stackable integrated circuit layer and a device made from the method are disclosed. A stud bump is defined on the contact pad of an integrated circuit die and the stud-bumped die encapsulated in a potting material to define a potted assembly. A predetermined portion of the potting material is removed whereby a portion of the stud bump is exposed. One or more electrically conductive traces are defined on the layer surface and in electrical connection with the stud bump to reroute the integrated circuit contacts to predetermined locations on the layer to provide a stackable neolayer.Type: ApplicationFiled: October 12, 2011Publication date: March 22, 2012Applicant: Irvine Sensors CorporationInventors: Peter Lieu, James Yamaguchi, Randy Bindrup, W. Eric Boyd
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Publication number: 20120069528Abstract: A process and product made from the process is disclosed to minimize solder collapse during solder reflow. Predetermined bond pads on a layer or component have a solder paste such as Sn63 solder paste with a first lower reflow temperature applied and a spacer element such as an SAC solder ball or stud bump having a predetermined geometry with a second higher reflow temperature applied. The SAC solder balls or stud bumps act as spacing elements but do not interact with the solder paste such that the solder paste may be reflowed while precisely maintaining the space between the layers.Type: ApplicationFiled: August 15, 2011Publication date: March 22, 2012Applicant: Irvine Sensors CorporationInventors: Randy Bindrup, James Yamaguchi, W. Eric Boyd
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Publication number: 20110085304Abstract: A thermally conductive heat spreader is disclosed comprising one or more electrically isolated through-hole vias to provide, for instance, one or more thermal management layers having one or more electrically insulated and electrically conductive through-hole vias in a microelectronic module for the rerouting of one or more electrical signals to one or more layers in a stack of integrated circuit chip layers. The method of the invention comprises disposing an electrically conductive member within an aperture in a heat spreader blank wherein the electrically conductive member is electrically insulated from the heat spreader blank by means of a dielectric layer to provide a vertical through-hole via for the vertical routing of an electrical signal through the heat spreader.Type: ApplicationFiled: October 13, 2010Publication date: April 14, 2011Applicant: Irvine Sensors CorporationInventors: Randy Bindrup, Michael Miyake
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Patent number: 7215854Abstract: An improved low-loss waveguide crossover uses an out-of-plane, such as vertical, waveguide to bridge over any number of waveguides with very low, or essentially no, optical loss or crosstalk. Optical signals transmitted in a waveguide system having the improved waveguide crossover can cross over one or multiple transverse waveguides with a greatly reduced loss of signal intensity by using a second waveguide (such as a bridge) positioned in a second plane different from the plane containing the transverse waveguides. An optical signal from the input waveguide is coupled efficiently through directional coupling to the bridge waveguide and optionally from the bridge waveguide to the output waveguide. Methods for fabricating the improved waveguide crossover are described.Type: GrantFiled: August 12, 2005Date of Patent: May 8, 2007Assignee: Gemfire CorporationInventors: Arthur Telkamp, Randy Bindrup
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Patent number: 7062130Abstract: An improved low-loss waveguide crossover uses an out-of-plane, such as vertical, waveguide to bridge over any number of waveguides with very low, or essentially no, optical loss or crosstalk. Optical signals transmitted in a waveguide system having the improved waveguide crossover can cross over one or multiple transverse waveguides with a greatly reduced loss of signal intensity by using a second waveguide (such as a bridge) positioned in a second plane different from the plane containing the transverse waveguides. An optical signal from the input waveguide is coupled efficiently through directional coupling to the bridge waveguide and optionally from the bridge waveguide to the output waveguide. Methods for fabricating the improved waveguide crossover are described.Type: GrantFiled: February 18, 2004Date of Patent: June 13, 2006Inventors: Arthur Telkamp, Randy Bindrup
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Publication number: 20050271320Abstract: An improved low-loss waveguide crossover uses an out-of-plane, such as vertical, waveguide to bridge over any number of waveguides with very low, or essentially no, optical loss or crosstalk. Optical signals transmitted in a waveguide system having the improved waveguide crossover can cross over one or multiple transverse waveguides with a greatly reduced loss of signal intensity by using a second waveguide (such as a bridge) positioned in a second plane different from the plane containing the transverse waveguides. An optical signal from the input waveguide is coupled efficiently through directional coupling to the bridge waveguide and optionally from the bridge waveguide to the output waveguide. Methods for fabricating the improved waveguide crossover are described.Type: ApplicationFiled: August 12, 2005Publication date: December 8, 2005Inventors: Arthur Telkamp, Randy Bindrup
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Publication number: 20040258361Abstract: An improved low-loss waveguide crossover uses an out-of-plane, such as vertical, waveguide to bridge over any number of waveguides with very low, or essentially no, optical loss or crosstalk. Optical signals transmitted in a waveguide system having the improved waveguide crossover can cross over one or multiple transverse waveguides with a greatly reduced loss of signal intensity by using a second waveguide (such as a bridge) positioned in a second plane different from the plane containing the transverse waveguides. An optical signal from the input waveguide is coupled efficiently through directional coupling to the bridge waveguide and optionally from the bridge waveguide to the output waveguide. Methods for fabricating the improved waveguide crossover are described.Type: ApplicationFiled: February 18, 2004Publication date: December 23, 2004Applicant: Newport Opticom, Inc.Inventors: Arthur Telkamp, Randy Bindrup