Abstract: An improved circuit for providing automatic gain control (AGC) for incoming phase shift keyed (PSK) and quadrature amplitude modulated (QAM) signals. An absolute value circuit (193) and a comparator (195) provide a first error signal (197). An integrater (200,202) smoothes the first error signal (197) to provide a second error signal (201) to a variable-threshold threshold detector (204). The threshold (209) is initially set at a low value to allow the AGC circuit to quickly respond. A larger value is then used to reduce susceptibility to noise and provide for proper QAM operation. An error circuit (208,211,213) provides a non-linear response so that the gain variations will be small when the input signal (190) is large. This non-linear response further reduces the effects of noise on the AGC circuit.

Abstract: A phase locked loop circuit which eliminates the phase difference between an incoming reference signal and a sampling signal by sampling the incoming reference signal to produce a sampled signal. The sign of the sampled signal at two sample points is compared to determine in which quadrant a predetermined one of these sample points is located. The phase adjustment to the sampling signal is dependent upon the quadrant in which this sample point is located and the magnitude of this sample point. A large phase difference produces a large phase adjustment so that this sample point is quickly locked onto the zero-crossing points of the incoming reference signal. A small phase difference produces a small phase adjustment and prevents jitter. The lock onto the zero-crossing point of the incoming reference signal minimizes the data error rate of the modem.

Abstract: An improved analog front end circuit for a high performance modem comprising an oversampling sigma delta modulator analog-to-digital converter which employs a novel four phase clocked MOSFET switched capacitor integrator. The integrator is switched in a manner as to eliminate signal dependent charges in the MOSFET switches. The sigma delta modulator shifts quantization noise of the analog-to-digital conversion process out of baseband of the analog signal. A novel integrated decimating FIR low pass filter filters the quantization noise from the digital output signals, and reduces the number of digital signals to obtain a sufficient number of signal samples in order to provide operation at high speeds, for example 9600 bps. The improved four phase switched capacitor integrator is also suitable for use in sigma delta modulator circuits, analog-to-digital converter circuits, integrating cirucits, and the like.

Abstract: A method for feature negotiations between two synchronous modems. To engage in negotiations a modem must be configured to support synchronous operation, a data transfer rate of at least 4800 bits per second, and at least one non-default feature. After the orginating modem and the answering modem have completed standard handshaking sequences the originating modem initiates the negotiations by sending a list of supported features. The answering modem responds by confirming that all the features are supported, by returning a subset of the features list, or by sending a different features list. If the answering modem did not confirm the list then the originating modem responds to the subset or to the different list by confirming the subset or different list, by returning a subset of the different list, or by sending another different list.

Abstract: An improved circuit for generating phase and amplitude modulated signals in a modem. A first circuit (161) generates a first signal (163) using a 1200 Hz carrier (160) and an input data stream (162). This signal (163) is generated at the rate of 7200 samples per second. The first signal (163) is then sampled by a sampler (164) at a 3600 Hz rate (165). The sampled signal (166) contains both a 1200 Hz signal and a 2400 Hz signal. A bandpass filter (43) selects a 1200 Hz or a 2400 Hz center frequency. The resulting output (44) is a selectable 1200 Hz or 2400 Hz signal which is generated using only the data sampling points necessary to generate the first, 1200 Hz signal (163).

Abstract: A feature negotiation protocol for synchronous operation and a dynamically adjustable retraining sequence. An originating modem, after completing conventional or standard handshaking sequences, sends a list of desired features to an answering modem. The answering modem either concurs with the desired features, if they are all supported, or sends, back to the originating modem, a list of those features which are supported by the answering modem. After the end of a negotiation time-out period, both modems begin operation using the features which are common to both modems or by using default (standard) features for operation. If the adjustable duration retraining sequence is selected then each modem will measure the elapsed time since the end of its last transmission and, at the beginning of its next transmission, send a retraining sequence which is dependent upon this elapsed time.

Abstract: A modem with improved signal processing and handshaking capabilities as described. Two digital signal processors are used to perform independent, concurrent operations so that a faster execution rate is obtained and more precise calculations are made possible. The modem also uses an improved handshaking technique which allows the modem to maintain compatibility with existing 1200 and 2400 bps modems while allowing for negotiation for 4800 and 9600 bps communications. The modem also incorporates an improved baud clock recovery circuit which dynamically adjusts the actual sampling point in a manner dependent upon the difference between the actual sampling point and the optimal sampling point. This allows the actual sampling point to converge upon the desired sampling point at a high rate while minimizing jitter around the optimal sampling point.

Abstract: An improved V.22 bis 2400 bits per second (bps) handshake sequence detector. An incoming phase keyed (PSK) handshake sequence is autocorrelated using a frequency shift keyed (FSK) receiver (101). The autocorrelated signal is then filtered by a low pass filter (106). The autocorrelated, low pass filtered signal is then alternately fed, at a 1200 Hz rate, to two detectors (114,116). Each of the detectors (114,116) looks for one half of the handshake sequence. The output of each detector (114,116) is provided to an OR-gate (122). The 2400 bps handshake sequence is declared to be detected when either one or both of the detectors (114,116) detects its corresponding portion of the sequence.

Abstract: An improved baud clock recovery, synchronization and data sampling circuit for a modem. A CODEC (41) samples the incoming signal at a rate determined by the sample clock output of a presettable counter (236). The sampled signal is then squared (231) and bandpass filtered (232) to provide a recovered baud clock. A detector (233) signals the positive going zero-crossing points of the recovered baud clock. A lead/lag calculator (234) determines which of the signal samples is nearest the zero-crossing point. The calculator (234) then determines whether this and every subsequent 12th sampling point leads or lags the zero-crossing point by inspecting the sign of the recovered baud clock and adjusts the preset inputs of the counter (236) to cause the sample points to occur at the zero-crossing point.

Abstract: A fast phase reference recovery apparatus for use in a data communication system employing a signal constellation which is variant for certain rotations which will produce local minima in the phase error signal output of a phase lock loop. The incoming signal is rotated by one or more phase shifting networks, the outputs of which are provided to constellation decision circuits for the constellation in use. One of the constellation decision circuits will be locked on to the correct local minimum and thus on to the proper phase constellation, and the others will be locked onto incorrect rotations of the constellation. The magnitudes of the errors produced by the constellation decision circuits are compared and selection of the data signals from the proper circuit is made based on the relative magnitudes of these error signals. In preferred forms, the comparison of the magnitudes of the error signals is averaged over a predetermined number of baud times to improve reliability.

Abstract: This present invention relates to a system for providing secure communications without bandwidth expansion using an encryption method called masking whereby a masking signal is generated at the transmitter using a secret key which includes a predetermined threshold signal-to-noise ratio level that when added to a frequency modulated (FM) signal produces an unintelligible signal. Any type of masking signal as, for example, a sine wave, an FM signal, or bandlimited Gaussian noise, may be used. At the receiver, the corresponding masking signal used by the transmitter is regenerated and subtracted from the FM signal before demodulation. Because of the FM threshold effect, perfect removal of the masking signal is not required. It is only necessary to subtract enough of the masking signal such that the resulting signal-to-noise ratio (SNR) is above the required threshold for reliable demodulation of the original signal.

Abstract: The present invention relates to apparatus for placing digital words or a private key into a register in an integrated circuit in such a manner that it cannot be later read or modified from outside the integrated circuit for purposes of, for example, providing a secure communication system. More particularly, a special key register in the form of an externally programmable read-only-memory which is programmable from external to the integrated circuit is provided. The programmable register contains at least one extra bit which is not part of the private key for enabling the program line through a gating means and entering the private key into the appropriate locations in the register before a predetermined binary code is placed in the at least one extra bit location which disables the gating means and thereafter prevents the changing of the private key in the register.

Abstract: The present invention relates to a technique for transmitting an entire analog speech signal and a modulated data signal over a transmission channel such as a common analog telephone speech channel. The present technique multiplexes the entire modulated data signal within the normal analog speech signal frequency band where the speech is present and its signal power density characteristic is at a low level. Separation of the speech and data signals at the receiver is effected by recovering the modulation carrier frequency and demodulating the received signal to recover the data signal. The data signal is then remodulated with the recovered carrier and is convolved with an arbitrary channel impulse response in an adaptive filter whose output signal is subtracted from the received composite data and speech signal to generate the recovered speech signal.