Patents by Inventor Randy Klingenberg

Randy Klingenberg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8595574
    Abstract: Chain or logic diagnosis resolution can be enhanced in the presence of limited failure cycles using embodiments of the various methods, systems, and apparatus described herein. For example, pattern sets can be ordered according to a diagnosis coverage figure, which can be used to measure chain or logic diagnosability of the pattern set. Per-pin based diagnosis techniques can also be used to analyze limited failure data.
    Type: Grant
    Filed: May 6, 2013
    Date of Patent: November 26, 2013
    Assignee: Mentor Graphics Corporation
    Inventors: Yu Huang, Wu-Tung Cheng, Nagesh Tamarapalli, Janusz Rajski, Randy Klingenberg
  • Publication number: 20130246869
    Abstract: Chain or logic diagnosis resolution can be enhanced in the presence of limited failure cycles using embodiments of the various methods, systems, and apparatus described herein. For example, pattern sets can be ordered according to a diagnosis coverage figure, which can be used to measure chain or logic diagnosability of the pattern set. Per-pin based diagnosis techniques can also be used to analyze limited failure data.
    Type: Application
    Filed: May 6, 2013
    Publication date: September 19, 2013
    Applicant: Mentor Graphics Corporation
    Inventors: Yu Huang, Wu-Tung Cheng, Nagesh Tamarapalli, Janusz Rajski, Randy Klingenberg
  • Patent number: 8438438
    Abstract: Chain or logic diagnosis resolution can be enhanced in the presence of limited failure cycles using embodiments of the various methods, systems, and apparatus described herein. For example, pattern sets can be ordered according to a diagnosis coverage figure, which can be used to measure chain or logic diagnosability of the pattern set. Per-pin based diagnosis techniques can also be used to analyze limited failure data.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: May 7, 2013
    Assignee: Mentor Graphics Corporation
    Inventors: Yu Huang, Wu-Tung Cheng, Nagesh Tamarapalli, Randy Klingenberg, Janusz Rajski
  • Publication number: 20110126064
    Abstract: Chain or logic diagnosis resolution can be enhanced in the presence of limited failure cycles using embodiments of the various methods, systems, and apparatus described herein. For example, pattern sets can be ordered according to a diagnosis coverage figure, which can be used to measure chain or logic diagnosability of the pattern set. Per-pin based diagnosis techniques can also be used to analyze limited failure data.
    Type: Application
    Filed: November 17, 2010
    Publication date: May 26, 2011
    Inventors: Yu Huang, Wu-Tung Cheng, Nagesh Tamarapalli, Janusz Rajski, Randy Klingenberg
  • Patent number: 7840862
    Abstract: Chain or logic diagnosis resolution can be enhanced in the presence of limited failure cycles using embodiments of the various methods, systems, and apparatus described herein. For example, pattern sets can be ordered according to a diagnosis coverage figure, which can be used to measure chain or logic diagnosability of the pattern set. Per-pin based diagnosis techniques can also be used to analyze limited failure data.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: November 23, 2010
    Assignee: Mentor Graphics Corporation
    Inventors: Yu Huang, Wu-Tung Cheng, Nagesh Tamarapalli, Randy Klingenberg, Janusz Rajski
  • Publication number: 20070220381
    Abstract: Chain or logic diagnosis resolution can be enhanced in the presence of limited failure cycles using embodiments of the various methods, systems, and apparatus described herein. For example, pattern sets can be ordered according to a diagnosis coverage figure, which can be used to measure chain or logic diagnosability of the pattern set. Per-pin based diagnosis techniques can also be used to analyze limited failure data.
    Type: Application
    Filed: August 25, 2006
    Publication date: September 20, 2007
    Inventors: Yu Huang, Wu-Tung Cheng, Nagesh Tamarapalli, Randy Klingenberg, Janusz Rajski
  • Patent number: 6920597
    Abstract: A built-in-self-test (BIST) circuit is discussed for selecting tristate nets with substantially uniform distribution using a tristate testing control device (TTCD). The circuit allows the deterministic testing of tristate nets in the context of pseudo-random BIST. A feedback shift register is described that activates a single tristate or set of tristate at a time in order to avoid bus contention. Another TTCD embodiment uses a counter and decoder. A test mode switching unit (TMSU) coupled between the TTCD and the tristate net selects test or functional mode for tristate enables. Parallel multiplexers are discussed as one embodiment of a TMSU. Another TMSU embodiment describes even better test coverage. A method, which may be performed on a distributed computer system, is discussed for identifying tristate nets within a net-list and adding a TTCD and a TMSU to the net-list.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: July 19, 2005
    Inventors: Thomas Hans Rinderknecht, Randy Klingenberg, Nagesh Tamarapalli
  • Publication number: 20040025096
    Abstract: A built-in-self-test (BIST) circuit is discussed for selecting tristate nets with substantially uniform distribution using a tristate testing control device (TTCD). The circuit allows the deterministic testing of tristate nets in the context of pseudo-random BIST. A feedback shift register is described that activates a single tristate or set of tristate at a time in order to avoid bus contention. Another TTCD embodiment uses a counter and decoder. A test mode switching unit (TMSU) coupled between the TTCD and the tristate net selects test or functional mode for tristate enables. Parallel multiplexers are discussed as one embodiment of a TMSU. Another TMSU embodiment describes even better test coverage. A method, which may be performed on a distributed computer system, is discussed for identifying tristate nets within a net-list and adding a TTCD and a TMSU to the net-list.
    Type: Application
    Filed: July 31, 2002
    Publication date: February 5, 2004
    Inventors: Thomas Hans Rinderknecht, Randy Klingenberg, Nagesh Tamarapalli