Patents by Inventor Randy Roberson
Randy Roberson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10877913Abstract: Enhancements for managing quality of service in a multi-host Peripheral Component Interconnect Express (PCIe) switching environment involve a host system configured to maintain quality of service statistics corresponding to data interactions with a PCIe storage device available via a PCIe switch. The host system may further receive secondary quality of service statistics for one or more other host systems communicatively coupled to the PCIe device via the PCIe switch, and determine a maximum queue depth for the host system based on the quality of service statistics and the second quality of service statistics to maintain a quality of service for at least the host system.Type: GrantFiled: January 13, 2020Date of Patent: December 29, 2020Assignee: Western Digital Technologies, Inc.Inventors: Susan Elkington, Randy Roberson, Randall Hess, Michael Stillwell, Michael Walker
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Publication number: 20200151130Abstract: Enhancements for managing quality of service in a multi-host Peripheral Component Interconnect Express (PCIe) switching environment involve a host system configured to maintain quality of service statistics corresponding to data interactions with a PCIe storage device available via a PCIe switch. The host system may further receive secondary quality of service statistics for one or more other host systems communicatively coupled to the PCIe device via the PCIe switch, and determine a maximum queue depth for the host system based on the quality of service statistics and the second quality of service statistics to maintain a quality of service for at least the host system.Type: ApplicationFiled: January 13, 2020Publication date: May 14, 2020Inventors: Susan Elkington, Randy Roberson, Randall Hess, Michael Stillwell, Michael Walker
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Patent number: 10579567Abstract: Described herein are enhancements for managing quality of service in a multi-host Peripheral Component Interconnect Express (PCIe) switching environment. In one implementation, a host system is configured to maintain quality of service statistics corresponding to data interactions with a PCIe storage device available via a PCIe switch. The host system may further receive secondary quality of service statistics for one or more other host systems communicatively coupled to the PCIe device via the PCIe switch, and determine a maximum queue depth for the host system based on the quality of service statistics and the second quality of service statistics to maintain a quality of service for the host systems.Type: GrantFiled: June 28, 2017Date of Patent: March 3, 2020Assignee: Western Digital Technologies, Inc.Inventors: Susan Elkington, Randy Roberson, Randall Hess, Michael Stillwell, Michael Walker
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Publication number: 20190004988Abstract: Described herein are enhancements for managing quality of service in a multi-host Peripheral Component Interconnect Express (PCIe) switching environment. In one implementation, a host system is configured to maintain quality of service statistics corresponding to data interactions with a PCIe storage device available via a PCIe switch. The host system may further receive secondary quality of service statistics for one or more other host systems communicatively coupled to the PCIe device via the PCIe switch, and determine a maximum queue depth for the host system based on the quality of service statistics and the second quality of service statistics to maintain a quality of service for the host systems.Type: ApplicationFiled: June 28, 2017Publication date: January 3, 2019Inventors: Susan Elkington, Randy Roberson, Randall Hess, Michael Stillwell, Michael Walker
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Publication number: 20060085617Abstract: A data storage system is provided comprising memory allocation information associated with a change in a system configuration of memory allocation within a memory space, and means for updating the system configuration by saving the memory allocation information before updating the system configuration. A recovery record comprises memory allocation information associated with the change in system configuration of memory allocation, and a completion indicator comprises a first value if the memory allocation information is included in the system configuration and comprises a second value if the memory allocation information is not included in the system configuration.Type: ApplicationFiled: October 18, 2004Publication date: April 20, 2006Inventors: Randy Roberson, Tarun Thakur, Clark Lubbers
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Publication number: 20060085626Abstract: A data storage system and associated method comprising system configuration information; a first processor adapted for identifying a portion of the system configuration information in response to a configuration change request to the memory space, and for signaling an update request incident with the configuration change request to a second processor; and a second processor adapted for updating the portion in response to the update request and independently of the first processor.Type: ApplicationFiled: October 20, 2004Publication date: April 20, 2006Inventors: Randy Roberson, Clark Lubbers, Tarun Thakur
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Publication number: 20060085594Abstract: Metadata architecture and associated methodology for a data storage system employing a grid-based storage capacity wherein each grid defines a storage unit in terms of a plurality of storage domains along one axis against one or more rows of a plurality of storage stripes along another axis, and wherein a grid grouping of two or more grids defines a sheet of data storage capacity. The metadata comprises identification information stored in a memory space characterizing an allocation status of the sheets in the storage capacity. A method is provided for allocating memory for the grid-based storage capacity comprising determining whether the allocation is associated with an existing logical device. If the determining step is associated with an existing logical device, then a logical device allocation map and a sheet allocation table are accessed to allocate a selected storage unit. Otherwise, a sheet allocation descriptor and a sheet allocation map are accessed to allocate a selected storage unit.Type: ApplicationFiled: October 20, 2004Publication date: April 20, 2006Inventors: Randy Roberson, Clark Lubbers
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Publication number: 20060085593Abstract: A generic storage container system is provided for a grid-based storage architecture, comprising a generic storage container comprising a plurality of storage domains along one axis against a plurality of rows of stripes along another axis defining a preselected storage capacity, and configuration information allocating the stripes in response to a storage format specified by an allocation request. A method is provided for storing the data, comprising: providing the generic storage container; providing configuration information adapted for selectively allocating the stripes in relation to a data storage format; specifying a desired storage format; and allocating the stripes in response to the desired format.Type: ApplicationFiled: October 20, 2004Publication date: April 20, 2006Inventors: Clark Lubbers, Randy Roberson
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Publication number: 20060004990Abstract: Method and apparatus for performing distributed processing in a multi-processing unit environment. A first processing unit modifies a complex operation to provide an operational request packet comprising a corresponding simplex operation and remainder. The packet is communicated to a second processing unit which processes the packet to arrive at a result for the complex operation, preferably by arriving at a result for the simplex operation and combining this result with the remainder. In this way, inter-processor operations can be efficiently encoded and distributed to meet the requirements of a given architecture. Preferably, the first processing unit determines the remainder by separately arriving at the result for the complex operation. The complex operation is preferably characterized as a mathematical operation on a non-power of two operand (e.g., 30), and the simplex operation is characterized as a mathematical operation on a power of two operand (e.g., 32).Type: ApplicationFiled: July 2, 2004Publication date: January 5, 2006Applicant: Seagate Technology LLCInventors: Randy Roberson, Tarun Thakur, Justus Pendleton
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Publication number: 20050223156Abstract: Disclosed is a data storage architecture employing a plurality of data grids each comprising an array of equal capacity data storage blocks organized into a plurality of rows and a plurality of columns such that each column corresponds to a storage domain in a data storage system and each row of the plurality of rows corresponds to a plurality of data storage blocks, one data storage block from each column of the plurality of columns at the same physical address, with the plurality of rows each having a plurality of contiguous data storage blocks in each domain. Capacity grids are produce by applying one of a plurality of sparing versions that designate at least one data storage block in each row of the grid is designated as spare, Defined within each capacity grid are one or more data storage units.Type: ApplicationFiled: April 2, 2004Publication date: October 6, 2005Inventors: Clark Lubbers, Randy Roberson
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Publication number: 20050203874Abstract: A system and method for high performance multi-controller processing is disclosed. Independent Network storage controllers (NSCs) are connected by a high-speed data link. The NSCs control a plurality of storage devices. connected by a Fiber Channel Arbitrated Loop (FCAL). To provide redundancy, for a given logical unit of storage one NSC will function as the primary controller and the other NSC will function as the primary controller and the enhance the efficiency of command-response data transfers between NSCs, mirror memory is correlated with primary memory and named resources are used for command-response data transfers. Methods are disclosed to provide for efficient active mirroring of data.Type: ApplicationFiled: April 18, 2005Publication date: September 15, 2005Inventors: Clark Lubbers, R. Schow, Wayne Umland, Randy Roberson, Robert Bean
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Publication number: 20050160243Abstract: A storage system permits virtual storage of user data by implementing a logical disk mapping structure that provides access to user data stored on physical storage media and methods for generating point-in-time copies, or snapshots, of logical disks. A snapshot logical disk is referred to as a predecessor logical disk and the original logical disk is referred to as a successor logical disk. Creating a snapshot involves creating predecessor logical disk mapping data structures and populating the data structures with metadata that maps the predecessor logical disk to the user data stored on physical media. Logical disks include metadata that indicates whether user information is shared between logical disks. Multiple generations of snapshots may be created, and user data may be shared between these generations. Methods are disclosed for maintaining data accuracy when write I/O operations are directed to a logical disk.Type: ApplicationFiled: March 15, 2005Publication date: July 21, 2005Inventors: Clark Lubbers, James Reiser, Anuja Korgaonkar, Randy Roberson, Robert Bean
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Publication number: 20050066230Abstract: The present invention includes embodiments that minimize storage space and storage time in storage systems. In particular, the present invention appends additional information to data that will be stored. The contents of the additional information indicate the status of the stored data. Preferably, the additional information is not combined with another type of information so that it directly indicates the status of the stored data. Alternatively, the additional information can be used to determine the status of one or more corresponding data that are not the data to which the additional information is appended.Type: ApplicationFiled: September 23, 2003Publication date: March 24, 2005Inventors: Robert Bean, Clark Lubbers, Randy Roberson
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Publication number: 20050055529Abstract: A directory structure for a sparsely filled data container comprises a linked list, doubly linked list, skip list, or other non-fully populated list technique. One or more hierarchical levels of such lists may be used for sparsely filled directories. The directory structure may be converted to a conventional look-up table directory by reconstructing the directory when the directory becomes populated to certain point.Type: ApplicationFiled: September 10, 2003Publication date: March 10, 2005Inventors: Clark Lubbers, Randy Roberson
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Patent number: 5711012Abstract: An new cellular interface directly couples the speaker and microphone of a cellular telephone to a simultaneous voice and data (SVD) modem. This interface allows a cellular telephone user to use their cellular telephone for simultaneous voice and data communications over the cellular network. In addition, of the SVD modem has a port coupled to a switched facility of a switching system, this cellular interface allows the cellular telephone user to place a telephone call from their cellular telephone over the switched facility.Type: GrantFiled: April 26, 1996Date of Patent: January 20, 1998Assignee: Paradyne CorporationInventors: Stanley Bottoms, Gordon Bremer, Kenneth David Ko, D. Randy Roberson, Robert Earl Scott
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Patent number: 5537436Abstract: A number of arrangements and methods that achieve concurrent communication of analog information and digital information. In general terms, when the communication channel is viewed as a multi-dimensional space, the digital information signal is divided into symbols, and the symbols are mapped onto the signal space with a preset distance between them. The analog signal, generally limited in magnitude to less than half the distance separating the symbols, is converted to component signals and added (i.e., vector addition) to the symbols. The sum signal is then transmitted to the receiver where the symbols are detected and subtracted from the received signal to yield the analog signal components. The transmitted analog signal is recreated from those components.Type: GrantFiled: June 14, 1993Date of Patent: July 16, 1996Assignee: AT&T Corp.Inventors: Stanley Bottoms, Gordon Bremer, Joseph Q. Chapman, William R. Davis, Kenneth D. Ko, D. Randy Roberson, Luke J. Smithwick, Richard K. Smith