Patents by Inventor Rangakrishnan SRINIVASAN

Rangakrishnan SRINIVASAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11979846
    Abstract: A system and method for accurately determining a distance between two network devices using a Channel Sounding application is disclosed. The network devices each guarantee a fixed phase relationship between the transmit circuit and the receive circuit. In one embodiment, this is achieved by disposing the divider outside the phase locked loop and using the output of the divider to create the clocks for both the transmit circuit and receive circuit. In another embodiment, one or more dividers are disposed outside the phase locked loop, each having a reset, such that they can be initialized to a predetermined state. Further, by utilizing a divider with a reset, the quadrature signal generator is guaranteed to output clocks for the transmit circuit and the receive circuit that have a constant phase relationship.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: May 7, 2024
    Assignee: Silicon Laboratories Inc.
    Inventors: Rangakrishnan Srinivasan, John Khoury
  • Patent number: 11973509
    Abstract: A phase-locked loop (PLL) that provides a local oscillator signal for a radio. An oscillator of the PLL supplies an oscillator output signal. Control logic receives a request to change the oscillator output signal to a new frequency and responds to the request by setting a first capacitor circuit of the oscillator to a first capacitance that corresponds to a predetermined frequency of the oscillator output signal. The control logic also responds to the request by setting one or more other capacitor circuits of the oscillator according to temperature and according to a frequency difference between the predetermined frequency and the new frequency. After responding to the request by setting the first capacitor circuit and the one or more other capacitor circuits, the PLL locks to the new frequency using a signal from the PLL loop filter to adjust another capacitor circuit in the oscillator.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: April 30, 2024
    Assignee: Silicon Laboratories Inc.
    Inventors: Rangakrishnan Srinivasan, Zhongda Wang, Francesco Barale, Wenhuan Yu, Mustafa H. Koroglu, Yan Zhou, Terry L. Dickey
  • Publication number: 20240110972
    Abstract: Modulation testing separately enables slices of an analog varactor array of an LC oscillator. For each enabled slice, a reference voltage supplying a resistor ladder is set to a plurality of different reference voltage values. Resistor ladder voltages generated for the different reference voltage values are supplied to the enabled slice and a control voltage coupled to the enabled slice is swept for each of the reference voltage values. Respective frequencies of an oscillator signal coupled to an output of the LC oscillator are measured for each enabled slice for each combination of the reference voltage values and the control voltage values. The linearity of LC oscillator gain is determined for each of the reference voltage values for each slice based on the respective frequencies and the control voltage values. Passing/failing the modulation testing is based on the linearity of the LC oscillator gain.
    Type: Application
    Filed: February 24, 2023
    Publication date: April 4, 2024
    Inventors: Anant Verma, Rangakrishnan Srinivasan, Zhongda Wang
  • Publication number: 20240106398
    Abstract: In one aspect, an apparatus comprises: a driver circuit to receive first and second ramp signals and output first and second drive signals under control of a first bias signal and a second bias signal, the first bias signal having a first edge and a second edge, the second edge having a different edge rate than the first edge, the second bias signal having a third edge and a fourth edge, the third edge having a different edge rate than the fourth edge; and an output circuit coupled to the driver circuit, the output circuit comprising at least one first active device to be driven by the first drive signal and at least one second active device to be driven by the second drive signal, where the output circuit is to amplify and output a radio frequency (RF) signal.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 28, 2024
    Inventors: Rangakrishnan Srinivasan, Sriharsha Vasadi, Mustafa Koroglu, Zhongda Wang, Euisoo Yoo, Eddy Bell
  • Publication number: 20240022268
    Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
    Type: Application
    Filed: September 26, 2023
    Publication date: January 18, 2024
    Inventors: Euisoo Yoo, Arup Mukherji, Rangakrishnan Srinivasan, Vitor Pereira, Zhongda Wang, Sriharsha Vasadi
  • Publication number: 20230371067
    Abstract: A wireless communication device has a receiver to listen to a sequence of channels. A controller responds to a preamble being detected on a first channel while the receiver is tuned to the first channel by causing the receiver to stay on the first channel and decode packet(s) associated with the preamble. The controller responds to detection of a first symbol of a first transmission protocol and the preamble not being detected to cause the receiver to stay on the first channel for a predetermined time waiting for a retry. The controller responds to detection of a second symbol of a second transmission protocol and the preamble not being detected to cause the receiver to switch to an advertising channel of the second transmission protocol. If no preambles, noise, or symbols are detected, the receiver switches to listening to a next channel in the sequence after a fixed time.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Inventors: Terry L. Dickey, Yan Zhou, Wentao Li, Rangakrishnan Srinivasan
  • Patent number: 11804862
    Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: October 31, 2023
    Assignee: Silicon Laboratories Inc.
    Inventors: Euisoo Yoo, Arup Mukherji, Rangakrishnan Srinivasan, Vitor Pereira, Zhongda Wang, Sriharsha Vasadi
  • Publication number: 20230318609
    Abstract: A phase-locked loop (PLL) that provides a local oscillator signal for a radio. An oscillator of the PLL supplies an oscillator output signal. Control logic receives a request to change the oscillator output signal to a new frequency and responds to the request by setting a first capacitor circuit of the oscillator to a first capacitance that corresponds to a predetermined frequency of the oscillator output signal. The control logic also responds to the request by setting one or more other capacitor circuits of the oscillator according to temperature and according to a frequency difference between the predetermined frequency and the new frequency. After responding to the request by setting the first capacitor circuit and the one or more other capacitor circuits, the PLL locks to the new frequency using a signal from the PLL loop filter to adjust another capacitor circuit in the oscillator.
    Type: Application
    Filed: March 31, 2022
    Publication date: October 5, 2023
    Inventors: Rangakrishnan Srinivasan, Zhongda Wang, Francesco Barale, Wenhuan Yu, Mustafa H. Koroglu, Yan Zhou, Terry L. Dickey
  • Publication number: 20230189197
    Abstract: A system and method for accurately determining a distance between two network devices using a Channel Sounding application is disclosed. The network devices each guarantee a fixed phase relationship between the transmit circuit and the receive circuit. In one embodiment, this is achieved by disposing the divider outside the phase locked loop and using the output of the divider to create the clocks for both the transmit circuit and receive circuit. In another embodiment, one or more dividers are disposed outside the phase locked loop, each having a reset, such that they can be initialized to a predetermined state. Further, by utilizing a divider with a reset, the quadrature signal generator is guaranteed to output clocks for the transmit circuit and the receive circuit that have a constant phase relationship.
    Type: Application
    Filed: December 14, 2021
    Publication date: June 15, 2023
    Inventors: Rangakrishnan Srinivasan, John Khoury
  • Publication number: 20230099832
    Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
    Type: Application
    Filed: September 30, 2021
    Publication date: March 30, 2023
    Inventors: Euisoo Yoo, Arup Mukherji, Rangakrishnan Srinivasan, Vitor Pereira, Zhongda Wang, Sriharsha Vasadi
  • Patent number: 11444627
    Abstract: A system and method for accurately determining a distance between two network devices using a Channel Sounding application is disclosed. The network devices each guarantee a fixed phase relationship between the transmit circuit and the receive circuit. In one embodiment, this is achieved by incorporating the divider within the phase locked loop. The divider may have a reset, such that it can be initialized to a predetermined state. Further, by utilizing a divider disposed within the phase locked loop with a reset, the quadrature signal generator is guaranteed to output clocks for the transmit circuit and the receive circuit that have a constant phase relationship.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: September 13, 2022
    Assignee: Silicon Laboratories, Inc.
    Inventors: Rangakrishnan Srinivasan, Michael Wu, Francesco Barale, John Khoury, Aslamali A. Rafi
  • Publication number: 20210175855
    Abstract: A transmitter including a frequency synthesizer with a voltage-controlled oscillator that provides an oscillating signal, a programmable delay circuit that delays the oscillating signal to provide a delayed oscillating signal, a power amplifier that is configured to use the delayed oscillating signal for transmitting a signal, and a delay controller that programs the delay circuit with a delay time that reduces interference caused by coupling from the power amplifier to the voltage-controlled oscillator. The delay circuit may be programmed to reduce control voltage change of the voltage-controlled oscillator as a function of delay change, and/or to reduce phase noise degradation at an output of the transmitter as a function of delay change. The delay may be adjusted based on detected operating temperature. A calibration value may be determined at a calibration frequency, in which a frequency offset may be determined based on a selected channel frequency.
    Type: Application
    Filed: December 6, 2019
    Publication date: June 10, 2021
    Inventors: Rangakrishnan Srinivasan, Mustafa H. Koroglu, Zhongda Wang, Francesco Barale, Abdulkerim L. Coban, John M. Khoury, Sriharsha Vasadi, Michael S. Johnson, Vitor Pereira
  • Patent number: 10461701
    Abstract: In one form, a signal generator system such as a power amplifier system includes an amplification stage, a lowpass filter, and a controller. The amplification stage includes a first amplifier having an input for receiving an input signal, a control input for receiving a first control signal, and an output. The lowpass filter has a first input coupled to the output of the first amplifier, and an output. The controller has a first input coupled to the output of the lowpass filter, and a first output coupled to the control input of the first amplifier, wherein the controller varies the first control signal to reduce a difference between the output of the lowpass filter and a first target voltage level.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: October 29, 2019
    Assignee: SILICON LABORATORIES INC.
    Inventors: Sherry X. Wu, Sriharsha Vasadi, Mustafa H. Koroglu, Rangakrishnan Srinivasan
  • Publication number: 20190229684
    Abstract: In one form, a signal generator system such as a power amplifier system includes an amplification stage, a lowpass filter, and a controller. The amplification stage includes a first amplifier having an input for receiving an input signal, a control input for receiving a first control signal, and an output. The lowpass filter has a first input coupled to the output of the first amplifier, and an output. The controller has a first input coupled to the output of the lowpass filter, and a first output coupled to the control input of the first amplifier, wherein the controller varies the first control signal to reduce a difference between the output of the lowpass filter and a first target voltage level.
    Type: Application
    Filed: January 19, 2018
    Publication date: July 25, 2019
    Applicant: Silicon Laboratories Inc.
    Inventors: Sherry X. Wu, Sriharsha Vasadi, Mustafa H. Koroglu, Rangakrishnan Srinivasan
  • Patent number: 10256854
    Abstract: In an embodiment, an apparatus includes: a transmit circuit to upconvert a baseband signal to a first differential radio frequency (RF) signal, the transmit circuit to convert the first differential RF signal to a first single-ended RF signal; a duty cycle correction circuit coupled to the transmit circuit to receive the first single-ended RF signal and compensate for a duty cycle variation in the first single-ended RF signal to output a duty cycle-corrected RF signal; a conversion circuit to convert the duty cycle-corrected RF signal to a second differential RF signal; and an interface circuit to transfer the second differential RF signal from a first ground domain to a second ground domain.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: April 9, 2019
    Assignee: Silicon Laboratories Inc.
    Inventors: Rangakrishnan Srinivasan, Sriharsha Vasadi, Zhongda Wang, Mustafa H. Koroglu, John M. Khoury, Aslamali A. Rafi, Michael S. Johnson, Francesco Barale, Sherry Xiaohong Wu
  • Patent number: 9966965
    Abstract: An apparatus includes a signal generator. The signal generator includes a voltage controlled oscillator (VCO) coupled to provide an output signal having a frequency. The signal generator further includes an asymmetric divider coupled to receive the output signal of the VCO and to provide an output signal. The output signal of the asymmetric divider has a frequency that is half the frequency of the output signal of the VCO. The asymmetric divider presents a balanced load to the VCO.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: May 8, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Aslamali A. Rafi, Rangakrishnan Srinivasan, Francesco Barale
  • Publication number: 20170359076
    Abstract: An apparatus includes a signal generator. The signal generator includes a voltage controlled oscillator (VCO) coupled to provide an output signal having a frequency. The signal generator further includes an asymmetric divider coupled to receive the output signal of the VCO and to provide an output signal. The output signal of the asymmetric divider has a frequency that is half the frequency of the output signal of the VCO. The asymmetric divider presents a balanced load to the VCO.
    Type: Application
    Filed: December 6, 2016
    Publication date: December 14, 2017
    Inventors: Aslamali A. Rafi, Rangakrishnan Srinivasan, Francesco Barale
  • Patent number: 9503138
    Abstract: A circuit comprises a vector separator circuit to generate a first extracted signal according to (i) a first correlation signal, (ii) a second correlation signal, and (iii) a relative response signal. The first correlation signal corresponds to a first correlation between an input signal and a first test signal. The first test signal has a first frequency, and the input signal includes a first spur having the first frequency. The second correlation signal corresponds to a second correlation between the input signal and a second test signal. The second test signal has a second frequency. The relative response signal corresponds to a relative response of the second frequency in the first correlation signal.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: November 22, 2016
    Assignee: MARVELL WORLD TRADE LTD.
    Inventors: Brian T. Brunn, Rangakrishnan Srinivasan, Gregory T. Uehara, Marc Leroux, Zhiguo Wang, Jari Juhani Vahe, Rohit Mainkar
  • Publication number: 20160134315
    Abstract: A circuit comprises a vector separator circuit to generate a first extracted signal according to (i) a first correlation signal, (ii) a second correlation signal, and (iii) a relative response signal. The first correlation signal corresponds to a first correlation between an input signal and a first test signal. The first test signal has a first frequency, and the input signal includes a first spur having the first frequency. The second correlation signal corresponds to a second correlation between the input signal and a second test signal. The second test signal has a second frequency. The relative response signal corresponds to a relative response of the second frequency in the first correlation signal.
    Type: Application
    Filed: November 10, 2015
    Publication date: May 12, 2016
    Inventors: Brian T. BRUNN, Rangakrishnan SRINIVASAN, Gregory T. UEHARA, Marc LEROUX, Zhiguo WANG, Jari Juhani VAHE, Rohit MAINKAR