Patents by Inventor Ranjan Khurana

Ranjan Khurana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9741580
    Abstract: A method of forming a pattern on a substrate comprises forming spaced, upwardly-open, cylinder-like structures projecting longitudinally outward of a base. Sidewall lining is formed over inner and over outer sidewalls of the cylinder-like structures, and that forms interstitial spaces laterally outward of the cylinder-like structures. The interstitial spaces are individually surrounded by longitudinally-contacting sidewall linings that are over outer sidewalls of four of the cylinder-like structures. Other embodiments are disclosed, including structure independent of method.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: August 22, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Vishal Sipani, Anton J. deVilliers, William R. Brown, Shane J. Trapp, Ranjan Khurana, Kevin R. Shea
  • Patent number: 9583381
    Abstract: Methods of forming semiconductor devices and features in semiconductor device structures include conducting an anti-spacer process to remove portions of a first mask material to form first openings extending in a first direction. Another anti-spacer process is conducted to remove portions of the first mask material to form second openings extending in a second direction at an angle to the first direction. Portions of a second mask material underlying the first mask material at intersections of the first openings and second openings are removed to form holes in the second mask material and to expose a substrate underlying the second mask material.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: February 28, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Ranjan Khurana, Michael Hyatt, Scott L. Light, Kevin J. Torek, Anton J. deVilliers
  • Patent number: 9460998
    Abstract: Some embodiments include a semiconductor construction having a pair of lines extending primarily along a first direction, and having a pair of contacts between the lines. The contacts are spaced from one another by a lithographic dimension, and are spaced from the lines by sub-lithographic dimensions. Some embodiments include a method of forming a semiconductor construction. Features are formed over a base. Each feature has a first type sidewall and a second type sidewall. The features are spaced from one another by gaps. Some of the gaps are first type gaps between first type sidewalls, and others of the gaps are second type gaps between second type sidewalls. Masking material is formed to selectively fill the first type gaps relative to the second type gaps. Excess masking material is removed to leave a patterned mask. A pattern is transferred from the patterned mask into the base.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: October 4, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Justin B. Dorhout, Ranjan Khurana, David Swindler, Jianming Zhou
  • Patent number: 9229328
    Abstract: A method of forming a semiconductor device structure comprises forming a template material over a substrate, the template material exhibiting preferential wetting to a polymer block of a block copolymer. A positive tone photoresist material is formed over the template material. The positive tone photoresist material is exposed to radiation to form photoexposed regions and non-photoexposed regions of the positive tone photoresist material. The non-photoexposed regions of the positive tone photoresist material are removed with a negative tone developer to form a pattern of photoresist features. The pattern of photoresist features and unprotected portions of the template material are exposed to an oxidizing plasma to form trimmed photoresist features and a pattern of template features. The trimmed photoresist features are removed with a positive tone developer. Other methods of forming a semiconductor device structure, and a semiconductor device structure are also described.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: January 5, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Ranjan Khurana, Gurpreet S. Lugani, Dan B. Millward
  • Publication number: 20150206760
    Abstract: A method of forming a pattern on a substrate comprises forming spaced, upwardly-open, cylinder-like structures projecting longitudinally outward of a base. Sidewall lining is formed over inner and over outer sidewalls of the cylinder-like structures, and that forms interstitial spaces laterally outward of the cylinder-like structures. The interstitial spaces are individually surrounded by longitudinally-contacting sidewall linings that are over outer sidewalls of four of the cylinder-like structures. Other embodiments are disclosed, including structure independent of method.
    Type: Application
    Filed: March 31, 2015
    Publication date: July 23, 2015
    Inventors: Vishal Sipani, Anton J. deVilliers, William R. Brown, Shane J. Trapp, Ranjan Khurana, Kevin R. Shea
  • Patent number: 8999852
    Abstract: A method of forming a pattern on a substrate comprises forming spaced, upwardly-open, cylinder-like structures projecting longitudinally outward of a base. Sidewall lining is formed over inner and over outer sidewalls of the cylinder-like structures, and that forms interstitial spaces laterally outward of the cylinder-like structures. The interstitial spaces are individually surrounded by longitudinally-contacting sidewall linings that are over outer sidewalls of four of the cylinder-like structures. Other embodiments are disclosed, including structure independent of method.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: April 7, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Vishal Sipani, Anton J. deVillers, William R. Brown, Shane J. Trapp, Ranjan Khurana, Kevin R. Shea
  • Patent number: 8937018
    Abstract: A method of forming a pattern on a substrate includes forming spaced, upwardly-open, cylinder-like structures projecting longitudinally outward of a base. Photoresist is formed elevationally over and laterally inward of the cylinder-like structures. The photoresist is patterned to form interstitial spaces into the photoresist laterally outward of the cylinder-like structures. The interstitial spaces are individually surrounded by at least three of the cylinder-like structures. The patterned photoresist is used as an etch mask while etching interstitial openings into the base and while the photoresist is laterally inward of the cylinder-like structures. Other aspects are disclosed.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: January 20, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Vishal Sipani, Anton J. deVillers, Ranjan Khurana
  • Publication number: 20140370684
    Abstract: Methods of forming semiconductor devices and features in semiconductor device structures include conducting an anti-spacer process to remove portions of a first mask material to form first openings extending in a first direction. Another anti-spacer process is conducted to remove portions of the first mask material to form second openings extending in a second direction at an angle to the first direction. Portions of the second mask material underlying the first mask material at intersections of the first openings and second openings are removed to form holes in the second mask material and to expose a substrate underlying the second mask material.
    Type: Application
    Filed: June 14, 2013
    Publication date: December 18, 2014
    Inventors: Ranjan Khurana, Michael Hyatt, Scott L. Light, Kevin J. Torek, Anton J. deVilliers
  • Patent number: 8889558
    Abstract: A method of forming a pattern on a substrate includes forming openings in material of a substrate. The openings are widened to join with immediately adjacent of the openings to form spaced pillars comprising the material after the widening. Other embodiments are disclosed.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: November 18, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Ranjan Khurana, Anton J. deVillers, Kevin J. Torek, Shane J. Trapp, Scott L. Light, James M. Buntin
  • Patent number: 8889559
    Abstract: A method of forming a pattern on a substrate includes forming spaced first material-comprising pillars projecting elevationally outward of first openings formed in second material. Sidewall spacers are formed over sidewalls of the first material-comprising pillars. The sidewall spacers form interstitial spaces laterally outward of the first material-comprising pillars. The interstitial spaces are individually surrounded by longitudinally-contacting sidewall spacers that are over sidewalls of four of the first material-comprising pillars.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: November 18, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Shane J. Trapp, Ranjan Khurana, Kevin R. Shea
  • Publication number: 20140329179
    Abstract: A method of forming a semiconductor device structure comprises forming a template material over a substrate, the template material exhibiting preferential wetting to a polymer block of a block copolymer. A positive tone photoresist material is formed over the template material. The positive tone photoresist material is exposed to radiation to form photoexposed regions and non-photoexposed regions of the positive tone photoresist material. The non-photoexposed regions of the positive tone photoresist material are removed with a negative tone developer to form a pattern of photoresist features. The pattern of photoresist features and unprotected portions of the template material are exposed to an oxidizing plasma to form trimmed photoresist features and a pattern of template features. The trimmed photoresist features are removed with a positive tone developer. Other methods of forming a semiconductor device structure, and a semiconductor device structure are also described.
    Type: Application
    Filed: May 2, 2013
    Publication date: November 6, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Ranjan Khurana, Gurpreet S. Lugani, Dan B. Millward
  • Publication number: 20140256140
    Abstract: A method of forming a pattern on a substrate includes forming spaced, upwardly-open, cylinder-like structures projecting longitudinally outward of a base. Photoresist is formed elevationally over and laterally inward of the cylinder-like structures. The photoresist is patterned to form interstitial spaces into the photoresist laterally outward of the cylinder-like structures. The interstitial spaces are individually surrounded by at least three of the cylinder-like structures. The patterned photoresist is used as an etch mask while etching interstitial openings into the base and while the photoresist is laterally inward of the cylinder-like structures. Other aspects are disclosed.
    Type: Application
    Filed: March 6, 2013
    Publication date: September 11, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Vishal Sipani, Anton J. deVillers, Ranjan Khurana
  • Publication number: 20140232008
    Abstract: Some embodiments include a semiconductor construction having a pair of lines extending primarily along a first direction, and having a pair of contacts between the lines. The contacts are spaced from one another by a lithographic dimension, and are spaced from the lines by sub-lithographic dimensions. Some embodiments include a method of forming a semiconductor construction. Features are formed over a base. Each feature has a first type sidewall and a second type sidewall. The features are spaced from one another by gaps. Some of the gaps are first type gaps between first type sidewalls, and others of the gaps are second type gaps between second type sidewalls. Masking material is formed to selectively fill the first type gaps relative to the second type gaps. Excess masking material is removed to leave a patterned mask. A pattern is transferred from the patterned mask into the base.
    Type: Application
    Filed: April 23, 2014
    Publication date: August 21, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Justin B. Dorhout, Ranjan Khurana, David Swindler, Jianming Zhou
  • Patent number: 8796086
    Abstract: A method of forming a series of spaced trenches into a substrate includes forming a plurality of spaced lines over a substrate. Anisotropically etched sidewall spacers are formed on opposing sides of the spaced lines. Individual of the lines have greater maximum width than minimum width of space between immediately adjacent of the spacers between immediately adjacent of the lines. The spaced lines are removed to form a series of alternating first and second mask openings between the spacers. The first mask openings are located where the spaced lines were located and are wider than the second mask openings. Alternating first and second trenches are simultaneously etched into the substrate through the alternating first and second mask openings, respectively, to form the first trenches to be wider and deeper within the substrate than are the second trenches. Other implementations and embodiments are disclosed.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: August 5, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Neal L. Davis, Richard T. Housley, Ranjan Khurana
  • Publication number: 20140162459
    Abstract: A method of forming a pattern on a substrate includes forming spaced first material-comprising pillars projecting elevationally outward of first openings formed in second material. Sidewall spacers are formed over sidewalls of the first material-comprising pillars. The sidewall spacers form interstitial spaces laterally outward of the first material-comprising pillars. The interstitial spaces are individually surrounded by longitudinally-contacting sidewall spacers that are over sidewalls of four of the first material-comprising pillars.
    Type: Application
    Filed: December 12, 2012
    Publication date: June 12, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Shane J. Trapp, Ranjan Khurana, Kevin R. Shea
  • Publication number: 20140162457
    Abstract: A method of forming a pattern on a substrate comprises forming spaced, upwardly-open, cylinder-like structures projecting longitudinally outward of a base. Sidewall lining is formed over inner and over outer sidewalls of the cylinder-like structures, and that forms interstitial spaces laterally outward of the cylinder-like structures. The interstitial spaces are individually surrounded by longitudinally-contacting sidewall linings that are over outer sidewalls of four of the cylinder-like structures. Other embodiments are disclosed, including structure independent of method.
    Type: Application
    Filed: December 12, 2012
    Publication date: June 12, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Vishal Sipani, Anton J. deVillers, William R. Brown, Shane J. Trapp, Ranjan Khurana, Kevin R. Shea
  • Publication number: 20140162458
    Abstract: A method of forming a pattern on a substrate includes forming openings in material of a substrate. The openings are widened to join with immediately adjacent of the openings to form spaced pillars comprising the material after the widening. Other embodiments are disclosed.
    Type: Application
    Filed: December 12, 2012
    Publication date: June 12, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Ranjan Khurana, Anton J. DeVillers, Kevin J. Torek, Shane J. Trapp, Scott L. Light, James M. Buntin
  • Patent number: 8741781
    Abstract: Some embodiments include a semiconductor construction having a pair of lines extending primarily along a first direction, and having a pair of contacts between the lines. The contacts are spaced from one another by a lithographic dimension, and are spaced from the lines by sub-lithographic dimensions. Some embodiments include a method of forming a semiconductor construction. Features are formed over a base. Each feature has a first type sidewall and a second type sidewall. The features are spaced from one another by gaps. Some of the gaps are first type gaps between first type sidewalls, and others of the gaps are second type gaps between second type sidewalls. Masking material is formed to selectively fill the first type gaps relative to the second type gaps. Excess masking material is removed to leave a patterned mask. A pattern is transferred from the patterned mask into the base.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: June 3, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Justin B. Dorhout, Ranjan Khurana, David Swindler, Jianming Zhou
  • Publication number: 20140045317
    Abstract: A method of forming a series of spaced trenches into a substrate includes forming a plurality of spaced lines over a substrate. Anisotropically etched sidewall spacers are formed on opposing sides of the spaced lines. Individual of the lines have greater maximum width than minimum width of space between immediately adjacent of the spacers between immediately adjacent of the lines. The spaced lines are removed to form a series of alternating first and second mask openings between the spacers. The first mask openings are located where the spaced lines were located and are wider than the second mask openings. Alternating first and second trenches are simultaneously etched into the substrate through the alternating first and second mask openings, respectively, to form the first trenches to be wider and deeper within the substrate than are the second trenches. Other implementations and embodiments are disclosed.
    Type: Application
    Filed: October 15, 2013
    Publication date: February 13, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Neal L. Davis, Richard T. Housley, Ranjan Khurana
  • Publication number: 20130341795
    Abstract: Some embodiments include a semiconductor construction having a pair of lines extending primarily along a first direction, and having a pair of contacts between the lines. The contacts are spaced from one another by a lithographic dimension, and are spaced from the lines by sub-lithographic dimensions. Some embodiments include a method of forming a semiconductor construction. Features are formed over a base. Each feature has a first type sidewall and a second type sidewall. The features are spaced from one another by gaps. Some of the gaps are first type gaps between first type sidewalls, and others of the gaps are second type gaps between second type sidewalls. Masking material is formed to selectively fill the first type gaps relative to the second type gaps. Excess masking material is removed to leave a patterned mask. A pattern is transferred from the patterned mask into the base.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Justin B. Dorhout, Ranjan Khurana, David Swindler, Jianming Zhou