Patents by Inventor Ranjit S. Oberoi
Ranjit S. Oberoi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7042452Abstract: A graphics system invokes a dicing process if one or more edges of a triangle T have length greater than a maximum length (LMAX), invokes a central subdivision process if a coverage estimate for the triangle T is greater than a maximum coverage and all edges of triangle T have length less than or equal to LMAX, invokes rendering of a sequence of one or more single-layer triangles based on triangle T if the coverage estimate for triangle T is less than or equal to the maximum coverage and all edges have length less than or equal to LMAX. Said invocation of rendering of the sequence of single-layer triangles results in the application of a plurality of texture layers to samples corresponding to triangle T. The samples are stored in the TAB between the application of successive layers of said plurality of texture layers.Type: GrantFiled: October 2, 2003Date of Patent: May 9, 2006Assignee: Sun Microsystems, Inc.Inventors: Michael A. Wasserman, Ranjit S. Oberoi, David C. Kehlet, Te-Chun Yu
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Patent number: 6885384Abstract: A system and method are disclosed for reproducing a pre-selected larger 2-D sample location pattern from a smaller one by means of X,Y address permutation. This method, for example, allows hardware to effectively reproduce a pre-selected set of sample locations for an array of 128×128 sample bins from a smaller set of pre-selected sample locations for an array of 2×2 sample bins. A permutation logic unit may use a first portion of an address for a sample bin B to identify a corresponding 2-D transformation, apply the inverse of the transformation to a second portion of the sample bin address to identify the corresponding bin of the 2×2 array of sample bins, and apply the transformation to the sample locations stored in the corresponding bin to reproduce the sample locations pre-selected for sample bin B.Type: GrantFiled: March 12, 2003Date of Patent: April 26, 2005Assignee: Sun Microsystems, Inc.Inventors: Michael F. Deering, Nathaniel David Naegle, Ranjit S. Oberoi
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Patent number: 6859209Abstract: A graphics system applies multiple layers of texture information to triangles. The graphics system includes a hardware accelerator, a frame buffer and a video output processor. The hardware accelerator receives vertices of a triangle, identifies fragments of a sampling space which intersect the triangle, and applies the multiple layers of texture to the intersecting fragments. The multiple layers of textures may be stored in a texture memory external to the hardware accelerator. The hardware accelerator switches to a next texture layer after applying the textures of a current layer to all the fragments of the triangle. The hardware accelerator includes (or couples to) a texture accumulation buffer which stores color values associated with the triangle fragments between the application of successive texture layers. The frame buffer stores the samples and pixels generated from the samples by filtration. The video output processor transforms the pixels into a video signal.Type: GrantFiled: May 18, 2001Date of Patent: February 22, 2005Assignee: Sun Microsystems, Inc.Inventors: Michael G. Lavelle, Brian D. Emberling, Ranjit S. Oberoi, Deron D. Johnson, Ewa M. Kubalska
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Patent number: 6847378Abstract: In one embodiment, a scale and bias unit for use in a graphics system includes a preclamping unit configured to receive an input and to responsively generate an output value equal to a first value if the input is within a first input range. The scale and bias unit also includes a processing unit coupled to the preclamping unit and configured to perform a calculation on the input to generate the output value. The processing unit does not perform the calculation if the input is within the first input range.Type: GrantFiled: March 7, 2002Date of Patent: January 25, 2005Assignee: Sun Microsystems, Inc.Inventors: Ranjit S. Oberoi, Michael G. Lavelle, Anthony S. Ramirez
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Patent number: 6795080Abstract: A graphics system configured to apply multiple layers of texture information to batches of primitives. The graphics system collects primitives into a batch that share a common set of texture layers to be applied. The batch is limited so that the total estimate size of the batch is less than or equal to a storage capacity of a texture accumulation buffer. The graphics system stores samples (or fragments) corresponding to the batch primitives in the texture accumulation buffer between the application of successive texture layers.Type: GrantFiled: January 30, 2002Date of Patent: September 21, 2004Assignee: Sun Microsystems, Inc.Inventors: Michael G. Lavelle, David C. Kehlet, Michael A. Wasserman, Nandini Ramani, Ranjit S. Oberoi
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Patent number: 6747663Abstract: A graphics system comprises a rendering unit, a sample buffer and a sample-to-pixel calculation unit. The rendering unit receives graphics data specifying three triangle vertices, generates sample positions, and determines which samples reside inside the triangle. The rendering unit computes an axial rate of change of an ordinate based on the positions and ordinates of the vertices, and, for each sample residing inside the triangle, (a) multiplies the axial rate by a edge-relative sample displacement resulting in a first product, (b) interpolates a projection value for a projection point on a first edge of the triangle, and (c) adds the first product to the projection value resulting in a sample ordinate value. The sample buffer stores the sample ordinate value the samples inside the triangle. The sample-to-pixel calculation unit reads sample ordinate values from the sample buffer and generates a pixel value by filtering the sample ordinate values.Type: GrantFiled: August 24, 2001Date of Patent: June 8, 2004Assignee: Sun Microsystems, Inc.Inventors: Ranjit S. Oberoi, Michael F. Deering, Salvatore Arcuri
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Publication number: 20030179199Abstract: A system and method are disclosed for reproducing a pre-selected larger 2-D sample location pattern from a smaller one by means of X,Y address permutation. This method, for example, allows hardware to effectively reproduce a pre-selected set of sample locations for an array of 128×128 sample bins from a smaller set of pre-selected sample locations for an array of 2×2 sample bins. A permutation logic unit may use a first portion of an address for a sample bin B to identify a corresponding 2-D transformation, apply the inverse of the transformation to a second portion of the sample bin address to identify the corresponding bin of the 2×2 array of sample bins, and apply the transformation to the sample locations stored in the corresponding bin to reproduce the sample locations pre-selected for sample bin B.Type: ApplicationFiled: March 12, 2003Publication date: September 25, 2003Applicant: Sun Microsystems, Inc.Inventors: Michael F. Deering, Nathaniel David Naegle, Ranjit S. Oberoi
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Publication number: 20030169274Abstract: In one embodiment, a scale and bias unit for use in a graphics system includes a preclamping unit configured to receive an input and to responsively generate an output value equal to a first value if the input is within a first input range. The scale and bias unit also includes a processing unit coupled to the preclamping unit and configured to perform a calculation on the input to generate the output value. The processing unit does not perform the calculation if the input is within the first input range.Type: ApplicationFiled: March 7, 2002Publication date: September 11, 2003Inventors: Ranjit S. Oberoi, Michael G. Lavelle, Anthony S. Ramirez
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Publication number: 20030169279Abstract: A reconfigurable system for performing a set of arithmetic operations. The reconfigurable system may have a frame buffer, an accumulation buffer and a pixel computation unit. The pixel computation unit includes a control unit and one or more copies of a reconfigurable circuit. The reconfigurable circuit may include a subtractor, a multiplier, an adder, and a set of multiplexors. The control logic drives selects lines of the set of multiplexors in the one or more circuit copies through one or more computational cycles in order to implement a programmable operation (such as scale and/or bias, accumulate, dynamic blend and matrix multiply). The pixel computation unit may receive pixels values from one or more sources including the frame buffer and the texture buffer, and operate on the pixels using the one or more circuit copies to generate a stream of output pixels.Type: ApplicationFiled: March 5, 2002Publication date: September 11, 2003Inventors: Ranjit S. Oberoi, Anthony S. Ramirez, Brian D. Emberling
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Publication number: 20030164842Abstract: A system for dynamic blending of an image into an accumulation buffer. The blending system may include an accumulation buffer, an image buffer, and a mixing unit. The mixing unit may be configured to read a stream of image pixels from the image buffer, to read a stream of corresponding pixels from the accumulation buffer, to blend each image pixel with the corresponding accumulation buffer pixel based on an alpha value provided with the image pixel, and thus, generate a stream of output pixels. The stream of output pixels may be returned to the accumulation buffer. The color depth precision of the accumulation buffer may be larger than the color depth precision of the image buffer.Type: ApplicationFiled: March 4, 2002Publication date: September 4, 2003Inventors: Ranjit S. Oberoi, Michael G. Lavelle, Anthony S. Ramirez, Brian D. Emberling
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Publication number: 20030142104Abstract: A graphics system configured to apply multiple layers of texture information to batches of primitives. The graphics system collects primitives into a batch that share a common set of texture layers to be applied. The batch is limited so that the total estimate size of the batch is less than or equal to a storage capacity of a texture accumulation buffer. The graphics system stores samples (or fragments) corresponding to the batch primitives in the texture accumulation buffer between the application of successive texture layers.Type: ApplicationFiled: January 30, 2002Publication date: July 31, 2003Inventors: Michael G. Lavelle, David C. Kehlet, Michael A. Wasserman, Nandini Ramani, Ranjit S. Oberoi
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Publication number: 20020180747Abstract: A graphics system configured to apply multiple layers of texture information to primitives. The graphics system receives parameters defining a primitive and performs a size test on the primitive. If the size test cannot guarantee that a fragment size of the primitive is less than or equal to a fragment capacity of a texture accumulation buffer, the primitive is divided into subprimitives, and the graphics system applies the multiple layers of texture to fragments which intersect the primitive. The graphics system switches from a current layer to the layer next when it has applied textures corresponding to the current layer to all the fragments intersecting the primitive. The graphics system stores color values associated with the primitive fragments in the texture accumulation buffer between the application of successive texture layers.Type: ApplicationFiled: May 18, 2001Publication date: December 5, 2002Applicant: Sun Microsystems, Inc.Inventors: Michael G. Lavelle, Wayne A. Morse, Ranjit S. Oberoi, David C. Kehlet, Michael A. Wasserman, Brian D. Emberling, Roger W. Swanson
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Publication number: 20020171672Abstract: A graphics system applies multiple layers of texture information to triangles. The graphics system includes a hardware accelerator, a frame buffer and a video output processor. The hardware accelerator receives vertices of a triangle, identifies fragments of a sampling space which intersect the triangle, and applies the multiple layers of texture to the intersecting fragments. The multiple layers of textures may be stored in a texture memory external to the hardware accelerator. The hardware accelerator switches to a next texture layer after applying the textures of a current layer to all the fragments of the triangle. The hardware accelerator includes (or couples to) a texture accumulation buffer which stores color values associated with the triangle fragments between the application of successive texture layers. The frame buffer stores the samples and pixels generated from the samples by filtration. The video output processor transforms the pixels into a video signal.Type: ApplicationFiled: May 18, 2001Publication date: November 21, 2002Applicant: Sun Microsystems, Inc.Inventors: Michael G. Lavelle, Brian D. Emberling, Ranjit S. Oberoi, Deron D. Johnson, Ewa M. Kubalska
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Patent number: 6459428Abstract: A graphics system configured to perform programmable filtering of samples to generate pixel values. The graphics system comprises a frame buffer, an accelerator unit and a video output processor. The accelerator unit receives graphics primitives, renders samples for the graphics primitives, and stores the rendered samples into a sample area of the frame buffer. The accelerator unit subsequently reads the samples from the sample area of the frame buffer, and filters the samples with a programmable filter having a programmable support region. The resulting pixel values are stored in a pixel area of the frame buffer. The video output processor reads the pixel values from the pixel area and converts the pixel values into a video signal which is provided to a video output port.Type: GrantFiled: October 3, 2001Date of Patent: October 1, 2002Assignee: Sun Microsystems, Inc.Inventors: Wayne Eric Burk, Yan Y. Tang, Michael G. Lavelle, Philip C. Leung, Michael F. Deering, Ranjit S. Oberoi
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Publication number: 20020101417Abstract: A graphics system configured to perform programmable filtering of samples to generate pixel values. The graphics system comprises a frame buffer, an accelerator unit and a video output processor. The accelerator unit receives graphics primitives, renders samples for the graphics primitives, and stores the rendered samples into a sample area of the frame buffer. The accelerator unit subsequently reads the samples from the sample area of the frame buffer, and filters the samples with a programmable filter having a programmable support region. The resulting pixel values are stored in a pixel area of the frame buffer. The video output processor reads the pixel values from the pixel area and converts the pixel values into a video signal which is provided to a video output port.Type: ApplicationFiled: October 3, 2001Publication date: August 1, 2002Inventors: Wayne Eric Burk, Yan Y. Tang, Michael G. Lavelle, Philip C. Leung, Michael F. Deering, Ranjit S. Oberoi
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Publication number: 20020050979Abstract: A graphics system comprises a rendering unit, a sample buffer and a sample-to-pixel calculation unit. The rendering unit receives graphics data specifying three triangle vertices, generates sample positions, and determines which samples reside inside the triangle. The rendering unit computes an axial rate of change of an ordinate based on the positions and ordinates of the vertices, and, for each sample residing inside the triangle, (a) multiplies the axial rate by a edge-relative sample displacement resulting in a first product, (b) interpolates a projection value for a projection point on a first edge of the triangle, and (c) adds the first product to the projection value resulting in a sample ordinate value. The sample buffer stores the sample ordinate value the samples inside the triangle.Type: ApplicationFiled: August 24, 2001Publication date: May 2, 2002Applicant: Sun Microsystems, IncInventors: Ranjit S. Oberoi, Michael F. Deering, Salvatore Arcuri