Abstract: Approaches for addressing issues associated with processing workloads that exhibit high divergence in execution and data access are provided. A plurality of workload items to be processed at least partially in parallel may be identified. Coherence information associated with the plurality of workload items may be determined. The plurality of workload items may be enqueued in a segmented queue. The plurality of workload items may be sorted based at least on a similarity of the coherence information. The sorted plurality of workload items may be stored to the queue. Using a set of processing units, the workload items in the queue may be processed at least partially in parallel according to an order of the sorting.

Abstract: Embodiments provide for a graphics processing apparatus including a graphics processing unit having bounding volume logic to operate on a compressed bounding volume hierarchy, wherein each bounding volume node stores a parent bounding volume and multiple child bounding volumes that are encoded relative to the parent bounding volume.

Abstract: Embodiments provide for a graphics processing apparatus including a graphics processing unit having bounding volume logic to operate on a compressed bounding volume hierarchy, wherein each bounding volume node stores a parent bounding volume and multiple child bounding volumes that are encoded relative to the parent bounding volume.

Abstract: Embodiments provide for a graphics processing apparatus including a graphics processing unit having bounding volume logic to operate on a compressed bounding volume hierarchy, wherein each bounding volume node stores a parent bounding volume and multiple child bounding volumes that are encoded relative to the parent bounding volume.

Abstract: An analysis of the cost of processing tiles may be used to decide how to process the tiles. In one case two tiles may be merged. In another case a culling algorithm may be selected based on tile processing cost.

Abstract: An importance map indicates, for each of a plurality of pixels, whether the pixel is considered important enough to be rendered. A hierarchical tree for pixels is created to generate a hierarchical importance map. The hierarchical importance map may be used to stop traversal of a primitive that does not overlap a pixel indicated to be important.

Abstract: Embodiments provide for a graphics processing apparatus including a graphics processing unit having bounding volume logic to operate on a compressed bounding volume hierarchy, wherein each bounding volume node stores a parent bounding volume and multiple child bounding volumes that are encoded relative to the parent bounding volume.

Abstract: An apparatus and method are described for primitive pair merging. For example, one embodiment of a graphics processing apparatus comprises: primitive merging logic to generate merged primitive data for two or more primitives sharing at least one edge, wherein the merged primitive data includes a single set of vertices defining the at least one shared edge; and an intersection unit to test a plurality of rays against the merged primitive data to identify a closest primitive that each ray intersects, the intersection unit to perform shared computations for the shared edge.

Abstract: Embodiments provide for a graphics processing apparatus including a graphics processing unit having bounding volume logic to operate on a compressed bounding volume hierarchy, wherein each bounding volume node stores a parent bounding volume and multiple child bounding volumes that are encoded relative to the parent bounding volume.

Abstract: An importance map indicates, for each of a plurality of pixels, whether the pixel is considered important enough to be rendered. A hierarchical tree for pixels is created to generate a hierarchical importance map. The hierarchical importance map may be used to stop traversal of a primitive that does not overlap a pixel indicated to be important.

Abstract: An importance map indicates, for each of a plurality of pixels, whether the pixel is considered important enough to be rendered. A hierarchical tree for pixels is created to generate a hierarchical importance map. The hierarchical importance map may be used to stop traversal of a primitive that does not overlap a pixel indicated to be important.

Abstract: An importance map indicates, for each of a plurality of pixels, whether the pixel is considered important enough to be rendered. A hierarchical tree for pixels is created to generate a hierarchical importance map. The hierarchical importance map may be used to stop traversal of a primitive that does not overlap a pixel indicated to be important.

Abstract: In some embodiments, tile lists may be avoided by storing the geometry of a scene in a bounding volume hierarchy (BVH). For each tile, the bounding volume hierarchy is traversed. The traversals continued only into children nodes that overlap with the frustum on the tile. By relaxing the ordering constraint of rendering primitives, the BVH is traversed such that nodes that are closer to the viewer are traversed first, increasing the occlusion culling efficiency in some embodiments. Rendering the full scene between the central processing cores and the graphics processor may be done through a shared memory in some embodiments.

Abstract: An analysis of the cost of processing tiles may be used to decide how to process the tiles. In one case two tiles may be merged. In another case a culling algorithm may be selected based on tile processing cost.

Abstract: The time needed for back-end work can be estimated without actually doing the back-end work. Front-end counters record information for a cost model and heuristics may be used for when to split a tile and ordering work dispatch for cores. A special rasterizer discards triangles and fragments outside a sub-tile.

Abstract: In some embodiments, tile lists may be avoided by storing the geometry of a scene in a bounding volume hierarchy (BVH). For each tile, the bounding volume hierarchy is traversed. The traversals continued only into children nodes that overlap with the frustum on the tile. By relaxing the ordering constraint of rendering primitives, the BVH is traversed such that nodes that are closer to the viewer are traversed first, increasing the occlusion culling efficiency in some embodiments. Rendering the full scene between the central processing cores and the graphics processor may be done through a shared memory in some embodiments.

Abstract: The time needed for back-end work can be estimated without actually doing the back-end work. Front-end counters record information for a cost model and heuristics may be used for when to split a tile and ordering work dispatch for cores. A special rasterizer discards triangles and fragments outside a sub-tile.