Abstract: Structures for memory cell applications, including capacitors for DRAM and ferroelectric memory cells from FRAM, whose method of manufacture consists of depositing a ferroelectric or high-epsilon dielectric material to completely fill a cavity whose geometrical width is the sole determinant of the thickness of the electrically active portion of the ferroelectric or high-epsilon dielectric layer in the final device. In the preferred embodiment, the cavity into which the dielectric is deposited is defined by the gap between the plate and stack electrodes which are deposited and patterned in a through-mask plating step prior to the dielectric deposition.

Abstract: In the invention a pellicle mounting structural principle is provided whereby a membrane for protection of an X-ray mask is interchangeably positioned with proper spacing between the X-ray mask and the resist on the wafer in which the pattern produced by the X-ray exposure is to be formed. The mounting principle employs a combined assembly of, a membrane and spacer member subassembly together with a means for seectably separable retention to the supporting structural portion of the mask The principle accommodates membrane materials that may not be flexible and provides an ability to remove the membrane for cleaning or replacement and to removal and reassembly with ease in reestablishing the spacing with respect to the mask. The means for the selectably separable retention to the supporting structural portion of the mask involves the use of springs and elastomers, securing to the sides of the supporting structural mask ring and the bonding of the spacer member directly to the mask.

Abstract: A precise thickness bulk etchable wafer material, that is responsive to protection with an oxide that inhibits insertion of an etch responsiveness altering material, is assembled with a membrane material that is susceptible to deposition processes. A bulk etch then removes most of the wafer. The arrangement permits the strength and rigidity of the bulk spacer to serve to permit the finely controllable deposition processes for ultra thin and wider ranges of membrane materials, the selective protection for spacer shaping and finally, the removal by the low stress process of etching, of the unused bulk spacer material. An oxide layer is patterned on a bulk spacer material wafer that has a thickness of the gap between an X-ray mask and the to be patterned oxide. The oxide on the bulk spacer material prevents conversion, through the exposed surface of the bulk spacer material wafer, of a portion of the wafer that is to serve as the spacer to a different etch responsiveness from that of the bulk spacer material.

Abstract: An inventive mirror system for use in providing reflected X-ray radiation to a mask having pattern areas and opaque areas, comprising a plurality of parallel mirror segments which are vertically positioned with respect to each other at distances approximately equal to the widths of the corresponding opaque mask areas. In operation, radiation incident on each of the mirror segments is reflected to the patterned feature areas of the mask and skips over the opaque mask areas.

Abstract: A membrane mask structure for lithography using a radiation source and steps for fabricating and using the inventive membrane mask structure. The membrane mask structure comprises the following: a support structure formed of a material which is opaque to the lithographic radiation source and comprising support members separated by window areas; a membrane layer overlaying said support members and window areas, said membrane layer comprised of material which is transparent to said radiation source; and a pattern of feature material formed on or embedded in the membrane layer, said feature material being opaque to the radiation source and said feature pattern aligning with the window areas of said support structure. The mask structure may additionally include a plurality of reference markers formed in or on said membrane layer or on said support members of said support structure.

Abstract: Structures for memory cell applications, including capacitors for DRAM and ferroelectric memory cells from FRAM, whose method of manufacture consists of depositing a ferroelectric or high-epsilon dielectric material to completely fill a cavity whose geometrical width is the sole determinant of the thickness of the electrically active portion of the ferroelectric or high-epsilon dielectric layer in the final device. In the preferred embodiment, the cavity into which the dielectric is deposited is defined by the gap between the plate and stack electrodes which are deposited and patterned in a through-mask plating step prior to the dielectric deposition.