Abstract: An image sensor includes a two-dimensional array of pixels having multiple column outputs and an output circuit connected to each column output. Each output circuit is configured to operate concurrent sample and read operations. An analog front end (AFE) circuit processes pixel data output from the output circuits and an AFE clock controller transmits an AFE clocking signal to the AFE circuit to effect processing of the pixel data. A timing generator outputs a column address sequence that is received by a column decoder. During one or more sample operations the timing generator suspends the column address sequence and subsequently during the one or more sample operations the AFE clock controller suspends the AFE clocking signal. The AFE clocking signal and the column address sequence resume at the end of the one or more sample operations.

Abstract: An image sensor includes a two-dimensional array of pixels having multiple column outputs and an output circuit connected to each column output. Each output circuit is configured to operate concurrent sample and read operations. An analog front end (AFE) circuit processes pixel data output from the output circuits and an AFE clock controller transmits an AFE clocking signal to the AFE circuit to effect processing of the pixel data. A timing generator outputs a column address sequence that is received by a column decoder. During one or more sample operations the AFE clock controller suspends the output of the AFE clocking signal and the timing generator suspends the output of the column address sequence during the sample operation. The output of the AFE clocking signal and the column address sequence resume at the end of the sample operation.

Abstract: An image sensor includes a two-dimensional array of pixels having multiple column outputs and an output circuit connected to each column output. Each output circuit is configured to operate concurrent sample and read operations. A timing generator outputs a column address sequence that is received by a column decoder that is electrically connected to each output circuit. The timing generator suspends the output of the column address sequence during a sample operation and resumes the output of the column address sequence at the end of the sample operation.

Abstract: An image sensor includes multiple photoactive pixels and multiple dark reference pixels arranged in rows and columns to form a pixel array. A dark signal is read out of one or more dark reference pixels in each column and used to determine a column offset for one or more columns in the pixel array. An offset window is used for each column in the pixel array to define an acceptable maximum dark signal and an acceptable minimum dark signal for each column. The dark signals from each column are analyzed to determine if there are any dark signals outside the offset window. If any of the dark signals are outside the offset window, the dark signal or signals can be compensated for or discarded.

Abstract: An image sensor includes a unit cell having a plurality of pixels; the unit cell comprising an amplifier input transistor that is shared by the plurality of pixels; a plurality of floating diffusions that are joined by a floating diffusion interconnect layer and are connected to the amplifier input transistor; and an interconnect layer which forms an output signal wire which shields the floating diffusion interconnect layer.

Abstract: An image sensor includes multiple photoactive pixels and multiple dark reference pixels arranged in rows and columns to form a pixel array. A dark signal is read out of one or more dark reference pixels in each column and used to determine a column offset for one or more columns in the pixel array. Each time an image or frame of an image is read out, the column offset for the one or more columns is updated using dark signals read out from a given number of dark reference pixels. The column offset for the one or more columns is scaled when a gain level is changed for a captured image.

Abstract: An image sensor includes a two-dimensional array of pixels having multiple column outputs and an output circuit connected to each column output. Each output circuit is configured to operate concurrent sample and read operations. A timing generator outputs a column address sequence that is received by a column decoder that is electrically connected to each output circuit. The timing generator suspends the output of the column address sequence during a sample operation and resumes the output of the column address sequence at the end of the sample operation.

Abstract: An image sensor includes a two-dimensional array of pixels having multiple column outputs and an output circuit connected to each column output. Each output circuit is configured to operate concurrent sample and read operations. A timing generator outputs a column address sequence that is received by a column decoder that is electrically connected to each output circuit. The timing generator suspends the output of the column address sequence during a sample operation and resumes the output of the column address sequence at the end of the sample operation.

Abstract: An image sensor includes multiple photoactive pixels and multiple dark reference pixels typically arranged in rows and columns to form a pixel array. A dark signal is read out from a given number of dark reference pixels in each column at a first gain level. An initial column offset correction is determined for one or more columns in the pixel array using respective dark signals read out at the first gain level. The initial column offset corrections are repeatedly scaled in response to each detected change to a different gain level. The column offset corrections can be scaled based on an amount of change between each respective different gain level and the first gain level.

Abstract: An image sensor includes multiple photoactive pixels and multiple dark reference pixels arranged in rows and columns to form a pixel array. A dark signal is read out of one or more dark reference pixels in each column and used to determine a column offset for one or more columns in the pixel array. Each time an image or frame of an image is read out, the column offset for the one or more columns is updated using dark signals read out from a given number of dark reference pixels. The column offset for the one or more columns is scaled when a gain level is changed for a captured image.

Abstract: An image sensor includes a two-dimensional array of pixels having multiple column outputs and an output circuit connected to each column output. Each output circuit is configured to operate concurrent sample and read operations. An analog front end (AFE) circuit processes pixel data output from the output circuits and an AFE clock controller transmits an AFE clocking signal to the AFE circuit to effect processing of the pixel data. A timing generator outputs a column address sequence that is received by a column decoder. During one or more sample operations the AFE clock controller suspends the output of the AFE clocking signal and the timing generator suspends the output of the column address sequence during the sample operation. The output of the AFE clocking signal and the column address sequence resume at the end of the sample operation.

Abstract: An image sensor includes multiple photoactive pixels and multiple dark reference pixels arranged in rows and columns to form a pixel array. A dark signal is read out of one or more dark reference pixels in each column and used to determine a column offset for one or more columns in the pixel array. An offset window is used for each column in the pixel array to define an acceptable maximum dark signal and an acceptable minimum dark signal for each column. The dark signals from each column are analyzed to determine if there are any dark signals outside the offset window. If any of the dark signals are outside the offset window, the dark signal or signals can be compensated for or discarded.

Abstract: An image sensor includes a two-dimensional array of pixels having multiple column outputs and an output circuit connected to each column output. Each output circuit is configured to operate concurrent sample and read operations. An analog front end (AFE) circuit processes pixel data output from the output circuits and an AFE clock controller transmits an AFE clocking signal to the AFE circuit to effect processing of the pixel data. A timing generator outputs a column address sequence that is received by a column decoder. During one or more sample operations the timing generator suspends the column address sequence and subsequently during the one or more sample operations the AFE clock controller suspends the AFE clocking signal. The AFE clocking signal and the column address sequence resume at the end of the one or more sample operations.

Abstract: An image sensor includes multiple photoactive pixels and multiple dark reference pixels typically arranged in rows and columns to form a pixel array. A dark signal is read out from a given number of dark reference pixels in each column at a first gain level. An initial column offset correction is determined for one or more columns in the pixel array using respective dark signals read out at the first gain level. The initial column offset corrections are repeatedly scaled in response to each detected change to a different gain level. The column offset corrections can be scaled based on an amount of change between each respective different gain level and the first gain level.

Abstract: A method of making an image sensor, the method includes the steps of providing a plurality of pixels each with a photodetector; providing an amplifier that is shared between the plurality of photodetectors; providing a transfer gate associated with each photodetector; providing a charge-to-voltage conversion region that is shared between the plurality of photodetectors; determining a capacitance between each transfer gate and the charge-to-voltage conversion region; and modifying the capacitance to be substantially the same by altering a physical structure within one or more pixels.

Abstract: A method of making an image sensor, the method includes the steps of providing a plurality of pixels each with a photodetector; providing an amplifier that is shared between the plurality of photodetectors; providing a transfer gate associated with each photodetector; providing a charge-to-voltage conversion region that is shared between the plurality of photodetectors; determining a capacitance between each transfer gate and the charge-to-voltage conversion region; and modifying the capacitance to be substantially the same by altering a physical structure within one or more pixels.

Abstract: An image sensor includes a unit cell having a plurality of pixels; the unit cell comprising an amplifier input transistor that is shared by the plurality of pixels; a plurality of floating diffusions that are joined by a floating diffusion interconnect layer and are connected to the amplifier input transistor; and an interconnect layer which forms an output signal wire which shields the floating diffusion interconnect layer.