Patents by Inventor Ravindra Babu Ganapathi

Ravindra Babu Ganapathi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11799738
    Abstract: A system, method, and apparatus may provide one or more tangible, nontransitory computer-readable storage media having stored thereon executable instructions to instruct a processor to: stripe an outgoing network message into two or more pieces; send a first piece to a receiver via a first network interface card (NIC), and a second piece to the receiver via a second NIC; and upon determining that the receiver failed to receive a piece of the outgoing network message, replay the piece that the receiver failed to receive via a third NIC.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: October 24, 2023
    Assignee: Intel Corporation
    Inventors: Ravindra Babu Ganapathi, Andrew Friedley, Ravi Murty, Vignesh Trichy Ravi
  • Patent number: 11736402
    Abstract: There is included in one example a switch, including: an ingress port to receive data from a source host; a first egress port to send data to a destination host; a second egress port to send data to the source host; and a congestion notification generator (CNG) including: a congestion detector to compute bandwidth consumption of a flow associated with a packet received on the ingress port and assigned to the first egress port, and determine based on the computed bandwidth consumption that the flow is congested; a flow extractor to extract a flow identifier of the flow from the packet; a throttle calculator to calculate a quantitative flow throttle value for the flow; and a header builder to build a congestion notification packet to instruct the source host to throttle the flow.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: August 22, 2023
    Assignee: Intel Corporation
    Inventors: Vignesh Trichy Ravi, Ravi Murty, Ravindra Babu Ganapathi, Michael A. Parker
  • Patent number: 11409673
    Abstract: Examples include a method of managing storage for triggered operations. The method includes receiving a request to allocate a triggered operation; if there is a free triggered operation, allocating the free triggered operation; if there is no free triggered operation, recovering one or more fired triggered operations, freeing one or more of the recovered triggered operations, and allocating one of the freed triggered operations; configuring the allocated triggered operation; and storing the configured triggered operation in a cache on an input/output (I/O) device for subsequent asynchronous execution of the configured triggered operation.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: August 9, 2022
    Assignee: Intel Corporation
    Inventors: Andrew Friedley, Sayantan Sur, Ravindra Babu Ganapathi, Travis Hamilton, Keith D. Underwood
  • Publication number: 20220141138
    Abstract: There is included in one example a switch, including: an ingress port to receive data from a source host; a first egress port to send data to a destination host; a second egress port to send data to the source host; and a congestion notification generator (CNG) including: a congestion detector to compute bandwidth consumption of a flow associated with a packet received on the ingress port and assigned to the first egress port, and determine based on the computed bandwidth consumption that the flow is congested; a flow extractor to extract a flow identifier of the flow from the packet; a throttle calculator to calculate a quantitative flow throttle value for the flow; and a header builder to build a congestion notification packet to instruct the source host to throttle the flow.
    Type: Application
    Filed: October 13, 2021
    Publication date: May 5, 2022
    Applicant: Intel Corporation
    Inventors: Vignesh Trichy Ravi, Ravi Murty, Ravindra Babu Ganapathi, Michael A. Parker
  • Publication number: 20220131768
    Abstract: A system, method, and apparatus may provide one or more tangible, nontransitory computer-readable storage media having stored thereon executable instructions to instruct a processor to: stripe an outgoing network message into two or more pieces; send a first piece to a receiver via a first network interface card (NIC), and a second piece to the receiver via a second NIC; and upon determining that the receiver failed to receive a piece of the outgoing network message, replay the piece that the receiver failed to receive via a third NIC.
    Type: Application
    Filed: January 7, 2022
    Publication date: April 28, 2022
    Applicant: Intel Corporation
    Inventors: Ravindra Babu Ganapathi, Andrew Friedley, Ravi Murty, Vignesh Trichy Ravi
  • Patent number: 11277350
    Abstract: Particular embodiments described herein provide for a system for enabling the communication of a large message using multiple network interface controllers (NICs). The system can be configured to determine that a message to communicate to a receiver over a network is above a threshold, determine a plurality of NICs to be used to communicate the message, create a manifest that includes an identifier of each of the plurality of NICs, and communicate the manifest to the receiver using a multi-unit message. In an example, the multi-unit message is communicated using a PUT command and the receiver can analyze the manifest and use a GET command to pull the message from the plurality of NICs.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: March 15, 2022
    Assignee: Intel Corporation
    Inventors: Ravi Murty, Keith D. Underwood, Ravindra Babu Ganapathi, Andrew Friedley, Vignesh Trichy Ravi
  • Patent number: 11150967
    Abstract: Methods, software, and systems for improved data transfer operations using overlapped rendezvous memory registration. Techniques are disclosed for transferring data between a first process operating as a sender and a second process operating as a receiver. The sender sends a PUT request message to the receiver including payload data stored in a send buffer and first and second match indicia. The first match indicia is used to determine whether the PUT request is expected or unexpected. If the PUT request is unexpected, an RMA GET operation is performed using the second matching indicia to pull data from the send buffer and write the data to a memory region in the user space of the process associated with the receiver. If the PUT request message is expected, the data payload with the PUT request is written to a receive buffer on the receiver determined using the first match indicia.
    Type: Grant
    Filed: September 30, 2017
    Date of Patent: October 19, 2021
    Assignee: Intel Corporation
    Inventors: Sayantan Sur, Keith Underwood, Ravindra Babu Ganapathi, Andrew Friedley
  • Patent number: 11153211
    Abstract: There is included in one example a switch, including: an ingress port to receive data from a source host; a first egress port to send data to a destination host; a second egress port to send data to the source host; and a congestion notification generator (CNG) including: a congestion detector to compute bandwidth consumption of a flow associated with a packet received on the ingress port and assigned to the first egress port, and determine based on the computed bandwidth consumption that the flow is congested; a flow extractor to extract a flow identifier of the flow from the packet; a throttle calculator to calculate a quantitative flow throttle value for the flow; and a header builder to build a congestion notification packet to instruct the source host to throttle the flow.
    Type: Grant
    Filed: December 9, 2017
    Date of Patent: October 19, 2021
    Assignee: Intel Corporation
    Inventors: Vignesh Trichy Ravi, Ravi Murty, Ravindra Babu Ganapathi, Michael A. Parker
  • Publication number: 20190179779
    Abstract: Examples include a method of managing storage for triggered operations. The method includes receiving a request to allocate a triggered operation; if there is a free triggered operation, allocating the free triggered operation; if there is no free triggered operation, recovering one or more fired triggered operations, freeing one or more of the recovered triggered operations, and allocating one of the freed triggered operations; configuring the allocated triggered operation; and storing the configured triggered operation in a cache on an input/output (I/O) device for subsequent asynchronous execution of the configured triggered operation.
    Type: Application
    Filed: February 14, 2019
    Publication date: June 13, 2019
    Inventors: Andrew FRIEDLEY, Sayantan SUR, Ravindra Babu GANAPATHI, Travis HAMILTON, Keith D. UNDERWOOD
  • Publication number: 20190182161
    Abstract: There is included in one example a switch, including: an ingress port to receive data from a source host; a first egress port to send data to a destination host; a second egress port to send data to the source host; and a congestion notification generator (CNG) including: a congestion detector to compute bandwidth consumption of a flow associated with a packet received on the ingress port and assigned to the first egress port, and determine based on the computed bandwidth consumption that the flow is congested; a flow extractor to extract a flow identifier of the flow from the packet; a throttle calculator to calculate a quantitative flow throttle value for the flow; and a header builder to build a congestion notification packet to instruct the source host to throttle the flow.
    Type: Application
    Filed: December 9, 2017
    Publication date: June 13, 2019
    Applicant: Intel Corporation
    Inventors: Vignesh Trichy Ravi, Ravi Murty, Ravindra Babu Ganapathi, Michael A. Parker
  • Publication number: 20190102236
    Abstract: Methods, software, and systems for improved data transfer operations using overlapped rendezvous memory registration. Techniques are disclosed for transferring data between a first process operating as a sender and a second process operating as a receiver. The sender sends a PUT request message to the receiver including payload data stored in a send buffer and first and second match indicia. Subsequent to or in conjunction with sending the PUT request message, the send buffer is exposed on the sender. The first match indicia is used to determine whether the PUT request is expected or unexpected. If the PUT request is unexpected, an RMA GET operation is performed using the second matching indicia to pull data from the send buffer and write the data to a memory region in the user space of the process associated with the receiver. The RMA GET operation may be retried one or more times in the event that the send buffer has yet to be exposed.
    Type: Application
    Filed: September 30, 2017
    Publication date: April 4, 2019
    Inventors: Sayantan Sur, Keith Underwood, Ravindra Babu Ganapathi, Andrew Friedley
  • Publication number: 20190044827
    Abstract: Particular embodiments described herein provide for a system for enabling the communication of a message using a network interface controller (NICs) on a subnet. In an example, the system is applicable to hardware offload NICs such as those implementing the Portals protocol. The system can be configured to determine a NIC in a first subnet to be used to communicate a message, where the NIC is configured to comply with a message passing interface protocol, create a manifest that includes an identifier of the NICs and a subnet ID that identifies the first subnet, and communicate the manifest to the receiver.
    Type: Application
    Filed: March 30, 2018
    Publication date: February 7, 2019
    Applicant: INTEL CORPORATOIN
    Inventors: Ravindra Babu Ganapathi, Andrew Friedley, Ravi Murty, Vignesh Trichy Ravi
  • Publication number: 20190044872
    Abstract: Technologies for targeted flow control recovery include a target computing device which detects whether resources of the target computing device are sufficient to process received messages from at least one source computing device and, in response to a determination that the resources are insufficient, (i) drops received message(s) from the affected source computing device(s) and (ii) determines whether to issue a targeted flow control recovery (i.e., at one of the source computing devices) or a global targeted flow control recovery (i.e., at all of the source computing devices) to instruct the source computing device(s) to stop transmitting messages to the target computing device.
    Type: Application
    Filed: March 30, 2018
    Publication date: February 7, 2019
    Inventors: Ravindra Babu Ganapathi, Andrew Friedley, Jim M. Snow, Keith D. Underwood
  • Publication number: 20190044875
    Abstract: Particular embodiments described herein provide for a system for enabling the communication of a large message using multiple network interface controllers (NICs). The system can be configured to determine that a message to communicate to a receiver over a network is above a threshold, determine a plurality of NICs to be used to communicate the message, create a manifest that includes an identifier of each of the plurality of NICs, and communicate the manifest to the receiver using a multi-unit message. In an example, the multi-unit message is communicated using a PUT command and the receiver can analyze the manifest and use a GET command to pull the message from the plurality of NICs.
    Type: Application
    Filed: January 9, 2018
    Publication date: February 7, 2019
    Applicant: Intel Corporation
    Inventors: Ravi Murty, Keith D. Underwood, Ravindra Babu Ganapathi, Andrew Friedley, Vignesh Trichy Ravi
  • Patent number: 9552303
    Abstract: A method and system for maintaining release consistency in shared memory programming on a computing device having multiple processing units includes, in response to a page fault, initiating a transfer, from one processing unit to another, of data associated with more than one but less than all of the pages of shared memory.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: January 24, 2017
    Assignee: Intel Corporation
    Inventors: Ravindra Babu Ganapathi, Hu Chen
  • Publication number: 20160335197
    Abstract: A method and system for maintaining release consistency in shared memory programming on a computing device having multiple processing units includes, in response to a page fault, initiating a transfer, from one processing unit to another, of data associated with more than one but less than all of the pages of shared memory.
    Type: Application
    Filed: July 25, 2016
    Publication date: November 17, 2016
    Inventors: Ravindra Babu Ganapathi, Hu Chen
  • Patent number: 9405477
    Abstract: A method and system for maintaining release consistency in shared memory programming on a computing device having multiple processing units includes, in response to a page fault, initiating a transfer, from one processing unit to another, of data associated with more than one but less than all of the pages of shared memory.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: August 2, 2016
    Assignee: Intel Corporation
    Inventors: Ravindra Babu Ganapathi, Hu Chen
  • Publication number: 20140258643
    Abstract: A method and system for maintaining release consistency in shared memory programming on a computing device having multiple processing units includes, in response to a page fault, initiating a transfer, from one processing unit to another, of data associated with more than one but less than all of the pages of shared memory.
    Type: Application
    Filed: April 25, 2012
    Publication date: September 11, 2014
    Inventors: Ravindra Babu Ganapathi, Hu Chen