Patents by Inventor Ravindra Babu Ganapathi
Ravindra Babu Ganapathi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11799738Abstract: A system, method, and apparatus may provide one or more tangible, nontransitory computer-readable storage media having stored thereon executable instructions to instruct a processor to: stripe an outgoing network message into two or more pieces; send a first piece to a receiver via a first network interface card (NIC), and a second piece to the receiver via a second NIC; and upon determining that the receiver failed to receive a piece of the outgoing network message, replay the piece that the receiver failed to receive via a third NIC.Type: GrantFiled: January 7, 2022Date of Patent: October 24, 2023Assignee: Intel CorporationInventors: Ravindra Babu Ganapathi, Andrew Friedley, Ravi Murty, Vignesh Trichy Ravi
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Patent number: 11736402Abstract: There is included in one example a switch, including: an ingress port to receive data from a source host; a first egress port to send data to a destination host; a second egress port to send data to the source host; and a congestion notification generator (CNG) including: a congestion detector to compute bandwidth consumption of a flow associated with a packet received on the ingress port and assigned to the first egress port, and determine based on the computed bandwidth consumption that the flow is congested; a flow extractor to extract a flow identifier of the flow from the packet; a throttle calculator to calculate a quantitative flow throttle value for the flow; and a header builder to build a congestion notification packet to instruct the source host to throttle the flow.Type: GrantFiled: October 13, 2021Date of Patent: August 22, 2023Assignee: Intel CorporationInventors: Vignesh Trichy Ravi, Ravi Murty, Ravindra Babu Ganapathi, Michael A. Parker
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Patent number: 11409673Abstract: Examples include a method of managing storage for triggered operations. The method includes receiving a request to allocate a triggered operation; if there is a free triggered operation, allocating the free triggered operation; if there is no free triggered operation, recovering one or more fired triggered operations, freeing one or more of the recovered triggered operations, and allocating one of the freed triggered operations; configuring the allocated triggered operation; and storing the configured triggered operation in a cache on an input/output (I/O) device for subsequent asynchronous execution of the configured triggered operation.Type: GrantFiled: February 14, 2019Date of Patent: August 9, 2022Assignee: Intel CorporationInventors: Andrew Friedley, Sayantan Sur, Ravindra Babu Ganapathi, Travis Hamilton, Keith D. Underwood
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Publication number: 20220141138Abstract: There is included in one example a switch, including: an ingress port to receive data from a source host; a first egress port to send data to a destination host; a second egress port to send data to the source host; and a congestion notification generator (CNG) including: a congestion detector to compute bandwidth consumption of a flow associated with a packet received on the ingress port and assigned to the first egress port, and determine based on the computed bandwidth consumption that the flow is congested; a flow extractor to extract a flow identifier of the flow from the packet; a throttle calculator to calculate a quantitative flow throttle value for the flow; and a header builder to build a congestion notification packet to instruct the source host to throttle the flow.Type: ApplicationFiled: October 13, 2021Publication date: May 5, 2022Applicant: Intel CorporationInventors: Vignesh Trichy Ravi, Ravi Murty, Ravindra Babu Ganapathi, Michael A. Parker
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Publication number: 20220131768Abstract: A system, method, and apparatus may provide one or more tangible, nontransitory computer-readable storage media having stored thereon executable instructions to instruct a processor to: stripe an outgoing network message into two or more pieces; send a first piece to a receiver via a first network interface card (NIC), and a second piece to the receiver via a second NIC; and upon determining that the receiver failed to receive a piece of the outgoing network message, replay the piece that the receiver failed to receive via a third NIC.Type: ApplicationFiled: January 7, 2022Publication date: April 28, 2022Applicant: Intel CorporationInventors: Ravindra Babu Ganapathi, Andrew Friedley, Ravi Murty, Vignesh Trichy Ravi
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Patent number: 11277350Abstract: Particular embodiments described herein provide for a system for enabling the communication of a large message using multiple network interface controllers (NICs). The system can be configured to determine that a message to communicate to a receiver over a network is above a threshold, determine a plurality of NICs to be used to communicate the message, create a manifest that includes an identifier of each of the plurality of NICs, and communicate the manifest to the receiver using a multi-unit message. In an example, the multi-unit message is communicated using a PUT command and the receiver can analyze the manifest and use a GET command to pull the message from the plurality of NICs.Type: GrantFiled: January 9, 2018Date of Patent: March 15, 2022Assignee: Intel CorporationInventors: Ravi Murty, Keith D. Underwood, Ravindra Babu Ganapathi, Andrew Friedley, Vignesh Trichy Ravi
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Patent number: 11150967Abstract: Methods, software, and systems for improved data transfer operations using overlapped rendezvous memory registration. Techniques are disclosed for transferring data between a first process operating as a sender and a second process operating as a receiver. The sender sends a PUT request message to the receiver including payload data stored in a send buffer and first and second match indicia. The first match indicia is used to determine whether the PUT request is expected or unexpected. If the PUT request is unexpected, an RMA GET operation is performed using the second matching indicia to pull data from the send buffer and write the data to a memory region in the user space of the process associated with the receiver. If the PUT request message is expected, the data payload with the PUT request is written to a receive buffer on the receiver determined using the first match indicia.Type: GrantFiled: September 30, 2017Date of Patent: October 19, 2021Assignee: Intel CorporationInventors: Sayantan Sur, Keith Underwood, Ravindra Babu Ganapathi, Andrew Friedley
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Patent number: 11153211Abstract: There is included in one example a switch, including: an ingress port to receive data from a source host; a first egress port to send data to a destination host; a second egress port to send data to the source host; and a congestion notification generator (CNG) including: a congestion detector to compute bandwidth consumption of a flow associated with a packet received on the ingress port and assigned to the first egress port, and determine based on the computed bandwidth consumption that the flow is congested; a flow extractor to extract a flow identifier of the flow from the packet; a throttle calculator to calculate a quantitative flow throttle value for the flow; and a header builder to build a congestion notification packet to instruct the source host to throttle the flow.Type: GrantFiled: December 9, 2017Date of Patent: October 19, 2021Assignee: Intel CorporationInventors: Vignesh Trichy Ravi, Ravi Murty, Ravindra Babu Ganapathi, Michael A. Parker
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Publication number: 20190179779Abstract: Examples include a method of managing storage for triggered operations. The method includes receiving a request to allocate a triggered operation; if there is a free triggered operation, allocating the free triggered operation; if there is no free triggered operation, recovering one or more fired triggered operations, freeing one or more of the recovered triggered operations, and allocating one of the freed triggered operations; configuring the allocated triggered operation; and storing the configured triggered operation in a cache on an input/output (I/O) device for subsequent asynchronous execution of the configured triggered operation.Type: ApplicationFiled: February 14, 2019Publication date: June 13, 2019Inventors: Andrew FRIEDLEY, Sayantan SUR, Ravindra Babu GANAPATHI, Travis HAMILTON, Keith D. UNDERWOOD
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Publication number: 20190182161Abstract: There is included in one example a switch, including: an ingress port to receive data from a source host; a first egress port to send data to a destination host; a second egress port to send data to the source host; and a congestion notification generator (CNG) including: a congestion detector to compute bandwidth consumption of a flow associated with a packet received on the ingress port and assigned to the first egress port, and determine based on the computed bandwidth consumption that the flow is congested; a flow extractor to extract a flow identifier of the flow from the packet; a throttle calculator to calculate a quantitative flow throttle value for the flow; and a header builder to build a congestion notification packet to instruct the source host to throttle the flow.Type: ApplicationFiled: December 9, 2017Publication date: June 13, 2019Applicant: Intel CorporationInventors: Vignesh Trichy Ravi, Ravi Murty, Ravindra Babu Ganapathi, Michael A. Parker
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Publication number: 20190102236Abstract: Methods, software, and systems for improved data transfer operations using overlapped rendezvous memory registration. Techniques are disclosed for transferring data between a first process operating as a sender and a second process operating as a receiver. The sender sends a PUT request message to the receiver including payload data stored in a send buffer and first and second match indicia. Subsequent to or in conjunction with sending the PUT request message, the send buffer is exposed on the sender. The first match indicia is used to determine whether the PUT request is expected or unexpected. If the PUT request is unexpected, an RMA GET operation is performed using the second matching indicia to pull data from the send buffer and write the data to a memory region in the user space of the process associated with the receiver. The RMA GET operation may be retried one or more times in the event that the send buffer has yet to be exposed.Type: ApplicationFiled: September 30, 2017Publication date: April 4, 2019Inventors: Sayantan Sur, Keith Underwood, Ravindra Babu Ganapathi, Andrew Friedley
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Publication number: 20190044827Abstract: Particular embodiments described herein provide for a system for enabling the communication of a message using a network interface controller (NICs) on a subnet. In an example, the system is applicable to hardware offload NICs such as those implementing the Portals protocol. The system can be configured to determine a NIC in a first subnet to be used to communicate a message, where the NIC is configured to comply with a message passing interface protocol, create a manifest that includes an identifier of the NICs and a subnet ID that identifies the first subnet, and communicate the manifest to the receiver.Type: ApplicationFiled: March 30, 2018Publication date: February 7, 2019Applicant: INTEL CORPORATOINInventors: Ravindra Babu Ganapathi, Andrew Friedley, Ravi Murty, Vignesh Trichy Ravi
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Publication number: 20190044872Abstract: Technologies for targeted flow control recovery include a target computing device which detects whether resources of the target computing device are sufficient to process received messages from at least one source computing device and, in response to a determination that the resources are insufficient, (i) drops received message(s) from the affected source computing device(s) and (ii) determines whether to issue a targeted flow control recovery (i.e., at one of the source computing devices) or a global targeted flow control recovery (i.e., at all of the source computing devices) to instruct the source computing device(s) to stop transmitting messages to the target computing device.Type: ApplicationFiled: March 30, 2018Publication date: February 7, 2019Inventors: Ravindra Babu Ganapathi, Andrew Friedley, Jim M. Snow, Keith D. Underwood
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Publication number: 20190044875Abstract: Particular embodiments described herein provide for a system for enabling the communication of a large message using multiple network interface controllers (NICs). The system can be configured to determine that a message to communicate to a receiver over a network is above a threshold, determine a plurality of NICs to be used to communicate the message, create a manifest that includes an identifier of each of the plurality of NICs, and communicate the manifest to the receiver using a multi-unit message. In an example, the multi-unit message is communicated using a PUT command and the receiver can analyze the manifest and use a GET command to pull the message from the plurality of NICs.Type: ApplicationFiled: January 9, 2018Publication date: February 7, 2019Applicant: Intel CorporationInventors: Ravi Murty, Keith D. Underwood, Ravindra Babu Ganapathi, Andrew Friedley, Vignesh Trichy Ravi
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Patent number: 9552303Abstract: A method and system for maintaining release consistency in shared memory programming on a computing device having multiple processing units includes, in response to a page fault, initiating a transfer, from one processing unit to another, of data associated with more than one but less than all of the pages of shared memory.Type: GrantFiled: July 25, 2016Date of Patent: January 24, 2017Assignee: Intel CorporationInventors: Ravindra Babu Ganapathi, Hu Chen
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Publication number: 20160335197Abstract: A method and system for maintaining release consistency in shared memory programming on a computing device having multiple processing units includes, in response to a page fault, initiating a transfer, from one processing unit to another, of data associated with more than one but less than all of the pages of shared memory.Type: ApplicationFiled: July 25, 2016Publication date: November 17, 2016Inventors: Ravindra Babu Ganapathi, Hu Chen
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Patent number: 9405477Abstract: A method and system for maintaining release consistency in shared memory programming on a computing device having multiple processing units includes, in response to a page fault, initiating a transfer, from one processing unit to another, of data associated with more than one but less than all of the pages of shared memory.Type: GrantFiled: April 25, 2012Date of Patent: August 2, 2016Assignee: Intel CorporationInventors: Ravindra Babu Ganapathi, Hu Chen
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Publication number: 20140258643Abstract: A method and system for maintaining release consistency in shared memory programming on a computing device having multiple processing units includes, in response to a page fault, initiating a transfer, from one processing unit to another, of data associated with more than one but less than all of the pages of shared memory.Type: ApplicationFiled: April 25, 2012Publication date: September 11, 2014Inventors: Ravindra Babu Ganapathi, Hu Chen