Abstract: Process and structure for semiconductor chip capacitors having high capacitance with variations in applied voltage without adding process steps to fabricate same.

Abstract: This zener diode is fabricated by a conventional CMOS device fabricating process whereby an entire electronic circuit can be laid down in one overall process. A semiconductor substrate of one conductivity type has an elongated deposit of semiconductor material of the opposite conductivity type diffused to a predetermined depth to form a well, centrally of which a deposit of enhanced semiconductor material of the same semiconductor conductivity type is diffused to a prearranged depth less than the predetermined depth. Semiconductor material of the one conductivity type is diffused into two elongated regions spaced apart from and on either side of the first elongated deposit while at the same time a quantity of the same material is diffused into the region between said two regions and over the centrally diffused region and doped more heavily than the substrate material to convert the upper part of the control diffusion to the opposite conductivity type for a substantial depth into the well whereby a p.sup.+ n.