Abstract: A method and apparatus are provided for implementing enhanced detection of circuit design limitations and stresses via enhanced waveform and schematic display. A selected simulation is run, for example, a transient, an AC, or a DC simulation. Then a displayed schematic highlights problem areas using a color set selected by a circuit designer.

Abstract: The present disclosure is directed to a method for hierarchical Very Large Scale Integrated (VLSI) mask layout data interrogation. The method displays a tree diagram of the layout hierarchy and then allows the user to interrogate the mask layout shapes by using a cross probing feature.

Abstract: To calibrate the VGA of a read head, test signals from a DAC are input to the VGA and the output of the VGA is observed, with the gain of the VGA being adjusted as appropriate. So that the DAC need not be made with tight tolerances, a DC signal can be fed into the DAC prior to VGA calibration, and an auxiliary ADC is used to receive the output of the DAC and to determine, for a given DC input, what the signal produced by the DAC actually is. In this way, during subsequent VGA calibration the test signal from the DAC is known not by virtue of the DAC having a tight manufacturing tolerance but by virtue of the actual measurements of its outputs for given register inputs.

Abstract: A method and apparatus are provided for optimizing calibration of a tunable filter over a wide range of frequencies in a data channel of a direct access storage device (DASD). Calibration codes are received for low corner frequency, banding, and high corner frequency. A programmable diode is provided with a DC portion and a tunable digital-to-analog converter (DAC). A calibration control current is generated for calibrating the tunable filter utilizing the programmable diode and the calibration codes. The programmable diode is used to vary the calibration control current to calibrate the tunable filter to a correct low corner frequency and high corner frequency. The programmable diode can be programmed over a large range.

Abstract: A method and apparatus are provided for optimizing calibration of a tunable filter over a wide range of frequencies in a data channel of a direct access storage device (DASD). Calibration codes are received for low corner frequency, banding, and high corner frequency. A programmable diode is provided with a DC portion and a tunable digital-to-analog converter (DAC). A calibration control current is generated for calibrating the tunable filter utilizing the programmable diode and the calibration codes. The programmable diode is used to vary the calibration control current to calibrate the tunable filter to a correct low corner frequency and high corner frequency. The programmable diode can be programmed over a large range.

Abstract: A system and method provides for calibrating a corner frequency of a tunable filter coupled to a read channel of a data storage system to a desired frequency. A signal having a frequency equal to the target corner frequency is generated. A gain of the signal is adjusted to a gain threshold. The gain of the signal is then increased from the gain threshold by a pre-established amount, such as by 3 dB. The corner frequency of the signal is shifted until the gain of the signal is substantially equal to the gain threshold, at which point the corner frequency of the tunable filter is calibrated to the desired frequency. The signal generated is a peak-detectable signal. The corner frequency of a tunable filter may be a low or high corner frequency appropriate for filtering a data signal or a servo signal. The corner frequency calibration circuitry may be implemented in-situ the read channel circuitry of a data storage system.

Abstract: A system and method are provided for calibrating a corner frequency of a tunable filter using an ADC code difference method. A method for calibrating a corner frequency of a tunable filter in a direct access storage device includes generating a signal having a frequency within a pass band of the tunable filter to be passed to the tunable filter. The gain of the signal is adjusted to a first threshold level. The corner frequency of the signal is shifted to a second threshold level, whereby the corner frequency of the tunable filter is calibrated at a desired frequency. A system for calibrating a corner frequency of a tunable filter in a direct access storage device includes calibrate control logic coupled to a tunable filter. A signal source generating a signal having a frequency within a pass band of the tunable filter to be passed to the tunable filter is coupled to the tunable filter by a variable gain amplifier. An analog-to-digital converter (ADC) is coupled to the tunable filter.

Abstract: A circuit arrangement for correcting magneto-resistive head asymmetry includes a shift circuit which receives a read signal from a magneto-resistive head, and a polarity signal indicative of the polarity of any asymmetry of the read signal. Depending on the polarity of the asymmetry, the shift circuit either adds or subtracts a shift voltage to the read signal to produce a shifted read signal. The shift circuit outputs the read signal, the shifted read signal, and the shift voltage. First, second and third gain circuits are provided, which receive the read signal, the shifted read signal, and the shift voltage, respectively, and which each receive a respective control signal. The first, second and third gain circuits provide respective outputs amplified proportionally based on the respective control signals. Control circuitry provides the polarity signal to the shift circuit and the respective control signals to the first, second and third gain circuits, based on an amount of correction required.

Abstract: A circuit arrangement and method vary in response to temperature changes the signal swing of an input signal to an analog circuit which has a temperature-dependent effective linear signal range. A variable gain circuit varies the signal swing of the input signal in response to a control signal supplied thereto by a temperature control circuit so that the signal swing tracks changes in the effective linear signal range of the analog circuit. In this manner, signal to noise ratio may be optimized and distortion may be minimized over a range of operating temperatures for the analog circuit.