Patents by Inventor Raymond Chau

Raymond Chau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11990394
    Abstract: A semiconductor package including a lead frame, an Ag plated surface positioned on the lead frame, an adhesion promotion layer positioned on the top of the Ag plated surface, and mold body covering the top of the lead frame is provided. The Ag plated surface covers a significant part of an interconnection area of the lead frame surface, and the Ag plating surface does not exceed the area of the mold body.
    Type: Grant
    Filed: September 15, 2021
    Date of Patent: May 21, 2024
    Assignee: Nexperia B.V.
    Inventors: Kim Ng, On Lok Chau, Wai Keung Ho, Raymond Wong
  • Publication number: 20230400508
    Abstract: A health monitoring, assessing and response system includes an interface and a controller. The interface is configured to receive a signal from a sensor disposed in a substrate processing system. The controller includes a health index module. The health index module is configured to perform an algorithm including: obtaining a window and a boundary threshold; monitoring the signal output from the sensor; determining whether the signal has crossed the boundary threshold; updating a health index component, where the health index component is a binary value and transitioned between HIGH and LOW values in response to the signal crossing the boundary threshold; and generating a health index value based on the health index component and decreasing the health index value from 100% to 0% over a duration of at least the window. The controller is configured to perform a countermeasure based on the health index value.
    Type: Application
    Filed: November 3, 2021
    Publication date: December 14, 2023
    Inventors: Bridget Hill FREESE, Scott BALDWIN, Justin TANG, Raymond CHAU, Thor Andreas RAABE, Robert J. STEGER, Lin ZHU
  • Publication number: 20230030233
    Abstract: A substrate processing system comprises a module to perform an operation associated with processing a semiconductor substrate in the substrate processing system. The module includes a component used with the processing of the semiconductor substrate, and a file stored in the module. The file includes information about the component of the module. The substrate processing system comprises a controller to communicate with the module via a network of the substrate processing system. The controller receives the file from the module via the network, reads the information about the component from the received file, and maps, based on the information read from the received file, the component of the module to an option in an application used to configure the module. The controller automatically configures the component of the module using the option in the application to which the component of the module is mapped.
    Type: Application
    Filed: November 13, 2020
    Publication date: February 2, 2023
    Inventors: Bridget HILL, Scott BALDWIN, Thomas A. STUBBLEBINE, Rainer UNTERGUGGENBERGER, Raymond CHAU
  • Publication number: 20220171373
    Abstract: For etching tools, a neural network model is trained to predict optimum scheduling parameter values. The model is trained using data collected from preventive maintenance operations, recipe times, and wafer-less auto clean times as inputs. The model is used to capture underlying relationships between scheduling parameter values and various wafer processing scenarios to make predictions. Additionally, in tools used for multiple parallel material deposition processes, a nested neural network based model is trained using machine learning. The model is initially designed and trained offline using simulated data and then trained online using real tool data for predicting wafer routing path and scheduling. The model improves accuracy of scheduler pacing and achieves highest tool/fleet utilization, shortest wait times, and fastest throughput.
    Type: Application
    Filed: March 24, 2020
    Publication date: June 2, 2022
    Inventors: Raymond CHAU, Chung-Ho HUANG, Henry CHAN, Vincent WONG, Yu DING, Ngoc-Diep NGUYEN, Gerramine MANUGUID
  • Patent number: 10510028
    Abstract: A method, apparatus and computer program product are provided in order to utilize task value units for imaging interpretation and other tasks, such as in the assignment of imaging interpretation and other tasks to a plurality of users. In the context of a method, the method associates, for each of a plurality of different types of imaging interpretation tasks and for each of a plurality of other tasks, a first task value unit therewith. The method also associates, for at least some of the plurality of different types of imaging interpretation or other tasks, a second task value unit, different than the first task value unit, therewith. Further, the method assigns imaging interpretation and other tasks to a plurality of users based at least partially upon the first and second task value units associated with the respective imaging interpretation tasks and the other tasks.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: December 17, 2019
    Assignee: CHANGE HEALTHCARE HOLDINGS, LLC
    Inventors: Eldon Wong, Albert Lai, Alexander Kouzin, Faisal Muslih, Gavin Wong, Laurie Bergeron, Raymond Chau
  • Publication number: 20160148146
    Abstract: A method, apparatus and computer program product are provided in order to utilize task value units for imaging interpretation and other tasks, such as in the assignment of imaging interpretation and other tasks to a plurality of users. In the context of a method, the method associates, for each of a plurality of different types of imaging interpretation tasks and for each of a plurality of other tasks, a first task value unit therewith. The method also associates, for at least some of the plurality of different types of imaging interpretation or other tasks, a second task value unit, different than the first task value unit, therewith. Further, the method assigns imaging interpretation and other tasks to a plurality of users based at least partially upon the first and second task value units associated with the respective imaging interpretation tasks and the other tasks.
    Type: Application
    Filed: November 25, 2014
    Publication date: May 26, 2016
    Inventors: Eldon Wong, Albert Lai, Alexander Kouzin, Faisal Muslih, Gavin Wong, Laurie Bergeron, Raymond Chau
  • Patent number: 8411073
    Abstract: A video processing device comprises a display interface coupleable to a display device and a display controller configured to transmit a video signal via an output node of the display interface. The video signal comprises an active segment comprising video information and an inactive segment comprising synchronization information. The video processing device further comprises a display detector configured to determine whether the display device is coupled to the display interface based on a comparison of a first voltage at the output node during transmission of the inactive segment to a second voltage.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: April 2, 2013
    Assignee: ATI Technologies ULC
    Inventors: David Glen, Jatin Naik, Raymond Chau, Paul Edelshteyn, Richard Fung
  • Publication number: 20090224866
    Abstract: A video processing device comprises a display interface coupleable to a display device and a display controller configured to transmit a video signal via an output node of the display interface. The video signal comprises an active segment comprising video information and an inactive segment comprising synchronization information. The video processing device further comprises a display detector configured to determine whether the display device is coupled to the display interface based on a comparison of a first voltage at the output node during transmission of the inactive segment to a second voltage.
    Type: Application
    Filed: November 13, 2008
    Publication date: September 10, 2009
    Applicant: ATI TECHNOLOGIES ULC
    Inventors: David Glen, Jatin Naik, Raymond Chau, Paul Edelshteyn, Richard Fung
  • Publication number: 20060052299
    Abstract: The present invention is directed to novel peptides and compositions capable of modulating viability and growth in neuronal cells, and to methods of modulating neuronal cell viability and growth employing the novel peptides and compositions of the invention. In one aspect, the invention is directed to novel peptide analogues of motoneuronotrophic factor 1 containing either a “WMLSAFS” or “FSRYAR domain,” which is sufficient for neurotrophic or neurotropic function.
    Type: Application
    Filed: January 21, 2004
    Publication date: March 9, 2006
    Applicant: Genervon Biopharmaceuticals LLC
    Inventors: Raymond Chau, Pui-Yuk Ko
  • Publication number: 20060025565
    Abstract: The present invention is directed to a novel purified polypeptide consisting of an amino acid sequence as set forth in SEQ ID NO: 4, one of the member of the Motoneuronotrophic Factor family which has shown to have diagnostic and therapeutic applications in mammals.
    Type: Application
    Filed: June 1, 2004
    Publication date: February 2, 2006
    Inventor: Raymond Chau
  • Patent number: 5821821
    Abstract: A voltage controlled oscillator comprising: a ring of inverters comprised of an odd number of serially connected CMOS inverter stages, the inverter stages being connected between first and second oppositely poled power leads, a MOSFET having a source-drain circuit connected between one of the power leads and a first power rail, the other power lead being connected to a second power rail, apparatus for operating the MOSFET in saturation, and apparatus for applying a control voltage to the gate of the MOSFET, referenced to the second power lead, whereby the MOSFET operates as a nonlinear current conduction device having a characteristic such as to linearize the voltage-frequency characteristic of the combined MOSFET--ring oscillator combination.
    Type: Grant
    Filed: February 24, 1997
    Date of Patent: October 13, 1998
    Assignee: ATI Technologies Incorporated
    Inventors: Ahmad Ahdab, Hugh Chow, Raymond Chau
  • Patent number: 5699387
    Abstract: A phase locked loop is comprised of a phase-frequency detector for providing to a charge pump up and down pulse signals having pulse widths proportional to phase differences between a pair of signals applied thereto, apparatus for introducing a relative phase difference between a first clock signal and a second signal to provide the pair of signals, the second signal being synchronized with an output signal of the loop, apparatus for providing a third up or down signal to the charge pump offsetting the effect of the introduced phase difference, and apparatus for obtaining a loop control voltage from the charge pump.
    Type: Grant
    Filed: June 23, 1993
    Date of Patent: December 16, 1997
    Assignee: ATI Technologies Inc.
    Inventors: Jim M. N. Seto, Roger P. Colbeck, Raymond Chau, Simon C. F. Leung
  • Patent number: 5682123
    Abstract: A voltage controlled oscillator comprised of a current controlled oscillator formed of a loop of serially connected inverters, the oscillator having a primary output at an output of one of the inverters for providing a primary pulse signal and a secondary output at the output of another inverter spaced from the one inverter by an odd number of inverters for providing a secondary pulse signal which is in antiphase to the primary pulse signal, apparatus for receiving the primary and secondary pulse signals and for providing an output signal which indicates the presence of a rising or falling edge to a corresponding primary or secondary pulse signal during a transmission time delay provided by the odd number of inverters.
    Type: Grant
    Filed: December 30, 1994
    Date of Patent: October 28, 1997
    Assignee: ATI Technologies Inc.
    Inventor: Raymond Chau
  • Patent number: 5459653
    Abstract: A voltage to current converter is formed of a first current steering mirror which includes first binary weighted current mirror transistors and receives an input voltage signal and converts it to an output current. The converter also is formed of a second current mirror which generates a selectable output current, the second current mirror being formed of second binary weighted current mirror transistors. The output currents of the first current steering mirror and second current mirror are added and the sum is provided to the control input of a current controlled oscillator which can be used in a phase locked loop.
    Type: Grant
    Filed: June 23, 1993
    Date of Patent: October 17, 1995
    Assignee: ATI Technologies Inc.
    Inventors: Jim M. N. Seto, Roger P. Colbeck, Raymond Chau, Simon C. F. Leung