Patents by Inventor Raymond Lord

Raymond Lord has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8103508
    Abstract: A voice activated language translation system that is accessed by telephones where voice messages of a caller are translated into a selected language and returned to the caller or optionally sent to another caller. A voice recognition system converts the voice messages into text of a first language. The text is then translated into text of the selected language. The text of the selected language is then converted into voice.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: January 24, 2012
    Assignee: Mitel Networks Corporation
    Inventor: John Raymond Lord
  • Publication number: 20030158722
    Abstract: A voice activated language translation system that is accessed by telephones where voice messages of a caller are translated into a selected language and returned to the caller or optionally sent to another caller. A voice recognition system converts the voice messages into text of a first language. The text is then translated into text of the selected language. The text of the selected language is then converted into voice.
    Type: Application
    Filed: February 19, 2003
    Publication date: August 21, 2003
    Applicant: Mitel Knowledge Corporation
    Inventor: John Raymond Lord
  • Patent number: 6333491
    Abstract: Circuit chips, such as known good die (KGD) chips, are removed from an assembly including a plurality of circuit chips attached to at least one chip carrier, or substrate. The substrate is held within a top plate with the circuit chips positioned within successive chip cavities within a bottom plate. Each chip cavity includes a load surface separated by a cascade effect pitch with respect to adjacent chip cavities. A cascade effect shear force is sequentially applied to the circuit chips to remove them from the substrate. The chips may be heated to a temperature facilitating shear within a temperature range at which solder connections are solid, and the chips further heated following disassembly to a temperature at which the solder is liquid to facilitate reforming the solder for subsequent attachment of the chip into an electronic device.
    Type: Grant
    Filed: November 1, 2000
    Date of Patent: December 25, 2001
    Assignee: International Business Machines Corporation
    Inventors: Christian Bergeron, Raymond Lord, Mario Racicot
  • Patent number: 6320163
    Abstract: Circuit chips, such as known good die (KGD) chips, are removed from an assembly including a plurality of circuit chips attached to at least one chip carrier, or substrate. The substrate is held within a top plate with the circuit chips positioned within successive chip cavities within a bottom plate. Each chip cavity includes a load surface separated by a cascade effect pitch with respect to adjacent chip cavities. A cascade effect shear force is sequentially applied to the circuit chips to remove them from the substrate. The chips may be heated to a temperature facilitating shear within a temperature range at which solder connections are solid, and the chips further heated following disassembly to a temperature at which the solder is liquid to facilitate reforming the solder for subsequent attachment of the chip into an electronic device.
    Type: Grant
    Filed: December 13, 2000
    Date of Patent: November 20, 2001
    Assignee: International Business Machines Corporation
    Inventors: Christian Bergeron, Raymond Lord, Mario Racicot
  • Publication number: 20010000208
    Abstract: Circuit chips, such as known good die (KGD) chips, are removed from an assembly including a plurality of circuit chips attached to at least one chip carrier, or substrate. The substrate is held within a top plate with the circuit chips positioned within successive chip cavities within a bottom plate. Each chip cavity includes a load surface separated by a cascade effect pitch with respect to adjacent chip cavities. A cascade effect shear force is sequentially applied to the circuit chips to remove them from the substrate. The chips may be heated to a temperature facilitating shear within a temperature range at which solder connections are solid, and the chips further heated following disassembly to a temperature at which the solder is liquid to facilitate reforming the solder for subsequent attachment of the chip into an electronic device.
    Type: Application
    Filed: December 13, 2000
    Publication date: April 12, 2001
    Inventors: Christian Bergeron, Raymond Lord, Mario Racicot
  • Patent number: 6163014
    Abstract: Circuit chips, such as known good die (KGD) chips, are removed from an assembly including a plurality of circuit chips attached to at least one chip carrier, or substrate. The substrate is held within a top plate with the circuit chips positioned within successive chip cavities within a bottom plate. Each chip cavity includes a load surface separated by a cascade effect pitch with respect to adjacent chip cavities. A cascade effect shear force is sequentially applied to the circuit chips to remove them from the substrate. The chips may be heated to a temperature facilitating shear within a temperature range at which solder connections are solid, and the chips further heated following disassembly to a temperature at which the solder is liquid to facilitate reforming the solder for subsequent attachment of the chip into an electronic device.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: December 19, 2000
    Assignee: International Business Machines Corporation
    Inventors: Christian Bergeron, Raymond Lord, Mario Racicot