Abstract: A programmable image transform system has a programmable addressing and arithmetic blocks. In the programmable addressing block, an input address generator has an input addressing microsequencer and an input addressing memory that stores an input addressing procedure. The microsequencer executes the input addressing procedure to generate addresses from which to request image data. In the programmable arithmetic block, an arithmetic block memory stores an image processing procedure and a microsequencer executes the image processing procedure using the image data to generate transformed image data.

Abstract: The joystick port interface includes an integrated circuit receiving an analog joystick position measurement signal and outputting a digital pulse signal to a processor which signifies a joystick coordinate value. The integrated circuit includes a pulse generator and a bidirectional buffer circuit. The bidirectional buffer circuit receives the analog joystick position measurement signal and selectively discharges an RC network capacitor which provides this analog measurement. This implementation provides a joystick port which uses low-voltage CMOS VLSI structures which can interface a conventional high-voltage joystick with the processor.

Abstract: A mud motor bearing assembly is disclosed for an oil-lubricated downhole drill mud motor. A number of parallel sets of angular contact ball bearings are located between the mandrel and the bearing housing in a sealed, oil-filled chamber to provide all compressive thrust load bearing, extension thrust load bearing and radial load bearing capacity. Oil filled pistons at each end retard the progress of mud contamination into the inside of the chamber containing the ball bearings.